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DM74184NNSN/a370avaiBCD-to-Binary and Binary-to-BCD Converters
DM74185ANNSCN/a22avaiBCD-to-Binary and Binary-to-BCD Converters


DM74184N ,BCD-to-Binary and Binary-to-BCD ConvertersDM74184/DM74185ABCD-to-BinaryandBinary-to-BCDConvertersJune1989DM74184/DM74185ABCD-to-BinaryandBina ..
DM74185AN ,BCD-to-Binary and Binary-to-BCD Convertersapplications. This means that a 6-bitment codes as specified in the function table when the de-conv ..
DM74191N ,Synchronous Up/Down 4-Bit Binary Counter with Mode ControlapplicationsThe clock, down/up, and load inputs are buffered to lowerYAlternate Military/Aerospace ..
DM74191N ,Synchronous Up/Down 4-Bit Binary Counter with Mode ControlFeaturesYSingle down/up count control lineThis counter is fully programmable; that is, the outputs ..
DM74197N ,PRESETTABLE BINARY COUNTERSGeneral Description The 't97 ripple counter contains divide-by-two and divide- by-eight section ..
DM7420N ,Dual 4-Input NAND GateFeaturesYAlternate Military/Aerospace device (5420) is available.This device contains two independe ..
DS1744W-120IND+ ,Y2K-Compliant, Nonvolatile Timekeeping RAMsPIN DESCRIPTION A0–A14 - Address Input CE - Chip Enable OE - Output Enable WE - Write Enable V ..
DS1744WP+120 ,Y2K-Compliant, Nonvolatile Timekeeping RAMs DS1744/DS1744P Y2K-Compliant, Nonvolatile Timekeeping RAMs
DS1744WP-120 ,Y2K-Compliant, Nonvolatile Timekeeping RAMsFEATURES PIN CONFIGURATIONS Integrated NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail C ..
DS1744WP-120+ ,Y2K-Compliant, Nonvolatile Timekeeping RAMsFEATURES PIN CONFIGURATIONS Integrated NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail C ..
DS1746 ,Y2K-Compliant, Nonvolatile Timekeeping RAMsFEATURES PIN CONFIGURATIONS  Integrated NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail C ..
DS1746-70+ ,Y2K-Compliant, Nonvolatile Timekeeping RAMsFEATURES PIN CONFIGURATIONS  Integrated NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail C ..


DM74184N-DM74185AN
BCD-to-Binary and Binary-to-BCD Converters
TL/F/6561
DM74184/DM74185A
BCD-to-Binary
and
Binary-to-BCD
Converters
June 1989
DM74184/DM74185A
BCD-to-Binary and Binary-to-BCD Converters
General Description
These monolithic convertersare derived fromthe 256-bit
read only memories, DM5488, and DM7488. Emitter con-
nectionsare madeto provide direct read-outof converted
codesat outputsY8 throughY1,as showninthe function
tables. These converters demonstratethe versatilityofa
read only memoryin thatan unlimited numberof reference
tablesor conversion tables maybe builtintoa system. Both these converters comprehend thatthe least significant
bits (LSB)ofthe binaryand BCD codesare logically equal,
andin each casethe LSB bypassesthe converteras illus-
tratedinthe typical applications. This means thata 6-bit
converteris producedin each case. Both devicesare cas-
cadabletoN bits. overriding enable inputis providedon each converter
which when taken high inhibitsthe function, causingallout-
putstogo high.Forthis reason, andto minimize power
consumption, unused outputs Y7andY8ofthe 185Aandall
‘‘don’t care’’ conditionsofthe 184are programmed high.
The outputsareofthe open-collector type.
DM74184 BCD-TO-BINARY CONVERTERS
The 6-bit BCD-to-binary functionofthe DM74184is analo-
goustothe algorithm: Shift BCD number right onebit and examine each dec-
ade. Subtract three from each 4-bit decade containinga
binary value greater than seven. Shift right, examine,and correct after each shift untilthe
least significant decade containsa number smaller than
eightandall other converted decades contain zeros. additionto BCD-to-binary conversion,the DM74184is
programmedto generate BCD9’s complementor BCD 10’s
complement. Again,in each case, onebitofthe comple-
ment codeis logically equaltooneofthe BCD bits; there-
fore, these complementscanbe producedon three lines. outputsY6,Y7and Y8arenot requiredinthe BCD-to-bi-
nary conversion, theyare utilizedto provide these comple-
ment codesas specifiedinthe function table whenthede-
vicesare connectedas shown.
DM74185A BINARY-TO-BCDCONVERTERS
The function performedby these 6-bit binary-to-BCD con-
vertersis analogoustothe algorithm: Examinethe three most significant bits.Ifthe sumis
greater than four,add threeand shiftleftonebit. Examine each BCD decade.Ifthe sumis greater than
four,add threeand shiftleftonebit. Repeat stepb untilthe least-significant binarybitisinthe
least-significant BCD location.
(Continued)
Connection Diagram
TL/F/6561–1
Order Number DM74184Nor DM74185AN
See NSPackageNumber N16E
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
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