DM74123N ,Dual Retriggerable One-Shot with Clear and Complementary OutputsFunctional DescriptionThe basic output pulse width is determined by selection of transition clear i ..
DM74123N ,Dual Retriggerable One-Shot with Clear and Complementary OutputsDM54123/DM74123DualRetriggerableOne-ShotwithClearandComplementaryOutputsMarch1993DM54123/DM74123Dua ..
DM74123N ,Dual Retriggerable One-Shot with Clear and Complementary OutputsFeaturesYDC triggered from active-high transition or active-lowThe ’123 is a dual retriggerable mon ..
DM74125N ,Quad TRI-STATE Buffers54125/DM54125/DM74125QuadTRI-STATEBuffersJune198954125/DM54125/DM74125QuadTRI-STATEÉBuffersGeneralD ..
DM74132N ,DM54132/DM74132 Quad 2-Input NAND Gates with Schmitt Trigger InputsDM54132/DM74132Quad2-InputNANDGateswithSchmittTriggerInputsJune1989DM54132/DM74132Quad2-InputNANDGa ..
DM74145N ,7 V, BCD to decimal decoder/driverElectrical Characteristics over recommended operating free air temperature range (unless otherwise ..
DS1742-85+ ,Y2KC Nonvolatile Timekeeping RAMFEATURES PIN CONFIGURATION Integrated NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail Co ..
DS1742W-120 ,Y2KC Nonvolatile Timekeeping RAMPIN DESCRIPTIONleap year compensation valid up to the year2100 A0-A10 - Address Inputs Battery vol ..
DS1742W-120+ ,Y2KC Nonvolatile Timekeeping RAM DS1742 Y2KC Nonvolatile Timekeeping RAM
DS1742W-120+ ,Y2KC Nonvolatile Timekeeping RAMPIN DESCRIPTION PIN NAM33B E FUNCTION 1 A7 2 A6 3 A5 4 A4 5 A3 6 A2 Address Input 7 A1 8 A0 19 A10 ..
DS1742W-150 ,Y2KC Nonvolatile Timekeeping RAMDS1742Y2KC Nonvolatile Timekeeping RAMwww.dalsemi.comPIN ASSIGNMENT
DS1742W-150+ ,Y2KC Nonvolatile Timekeeping RAMPIN DESCRIPTION PIN NAM33B E FUNCTION 1 A7 2 A6 3 A5 4 A4 5 A3 6 A2 Address Input 7 A1 8 A0 19 A10 ..
DM74123N
Dual Retriggerable One-Shot with Clear and Complementary Outputs
DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs August 1986 Revised March 2000 DM74123 Dual Retriggerable One-Shot with Clear and Complementary Outputs General Description Features The DM74123 is a dual retriggerable monostable multi- � DC triggered from active-HIGH transition or active-LOW vibrator capable of generating output pulses from a few transition inputs nano-seconds to extremely long duration up to 100% duty � Retriggerable to 100% duty cycle cycle. Each device has three inputs permitting the choice of � Direct reset terminates output pulse either leading-edge or trailing edge triggering. Pin (A) is an � Compensated for V and temperature variations active-LOW transition trigger input and pin (B) is an active- CC HIGH transition trigger input. A LOW at the clear (CLR) � DTL, TTL compatible input terminates the output pulse: which also inhibits trig- � Input clamp diodes gering. An internal connection from CLR to the input gate makes it possible to trigger the circuit by a positive-going signal on CLR as shown in the Truth Table. To obtain the best and trouble free operation from this device please read the Operating Rules as well as the One–Shot Application Notes carefully and observe recom- mendations. Ordering Code: Order Number Package Number Package Description DM74123N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram Triggering Truth Table Inputs Response AB CLR X X L No Trigger L X No Trigger H H Trigger HX No Trigger LH Trigger LHTrigger H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Functional Description The basic output pulse width is determined by selection of transition clear input. Retriggering to 100% duty cycle is an external resistor (R ) and capacitor (C ). Once trig- possible by application of an input pulse train whose cycle X X time is shorter than the output cycle time such that a con- gered, the basic pulse width may be extended by retrigger- tinuous “HIGH” logic state is maintained at the “Q” output. ing the gated active-LOW transition or active-HIGH transition inputs or be reduced by use of the active-LOW © 2000 DS006539
