DM74S374N ,3-STATE Octal D-Type Transparent LatchesLogic Diagrams
DM54/74sa73 DM54I74sa74
Transparent Latches Posltlve-Edge-Trlggered Flltr-F1ops
..
DM74S387AN ,30 ns, (256 x 4) 1024-bit TTL PROMBlock Diagram
1mm All"
32 x 32
HENRY MATRIX
M
if
E
am 03 02 ttl no
TL/D/9188-1
P ..
DM74S387N ,50 ns, (256 x 4) 1024-bit TTL PROMGeneral Description
This Schottky memory is organized in the popular 256
words by 4 bits config ..
DM74S40N ,Dual 4-Input NAND BufferGeneral DescriptionThis device contains two independent gates each of whichperforms the logic NAND ..
DM74S472AJ ,45 ns, (512 x 8) 4096-bit TTL PROMBlock Diagram
A7
M
M
A0
Al
4MB” ARRAY
M x M
MEMORY MAYRIX
DECDDER
A?
M
M
ml
..
DM74S472AN ,45 ns, (512 x 8) 4096-bit TTL PROMGeneral Description
This Schottky memory is organized in the popular 512
words by 8 bits config ..
DS2505 ,16kb Add-Only Memoryapplications include storage of calibration constants, maintenance records, asset tracking, product ..
DS2505 ,16kb Add-Only MemoryFEATURES PIN ASSIGNMENT 16384 bits Electrically Programmable Read TSOC PACKAGE TO-92Only Memory ..
DS2505 ,16kb Add-Only Memoryblock diagram in Figure 1 shows the relationships between the major control and memory sections of ..
DS2505 ,16kb Add-Only Memory DS2505 16Kb Add-Only Memory
DS2505+ ,16Kb Add-Only Memoryblock diagram in Figure 1 shows the relationships between the major control and memory sections of ..
DS2505P ,16-kbit Add-Only Memoryblock diagram in Figure 1 shows the relationships between the major control and memory sections oft ..
DM54S373J-DM74S373N-DM74S374N
7 V, TRI-STATE octal D-type transparent latch and edge-triggered flip-flop
$373 0 S374
National _
Semiconductor
DM54S373/DM74S373, DM54S374/DM74S374
TRI-STATE® Octal D-Type Transparent Latches
and Edge-Triggered Flip-Flops
General Description
These 8-bit registers feature totem-pole TRI-STATE outputs
designed specifically for driving highly-capacitive or relative-
ly low-impedance loads. The high-impedance state and in-
creased high-Iogic-level drive provide these registers with
the capability of being connected directly to and driving the
bus lines in a bus-organized system without need for 'mter-
face or pull-up components. They are particularly attractive
for implementing buffer registers, l/O ports, bidirectional
bus drivers, and working registers.
The eight latches of the DM54/748373 are transparent
D-type latches meaning that while the enable (G) is high the
Q outputs will follow the data (D) inputs. When the enable is
taken low the output will be latched at the level of the data
that was set up.
The eight tlip-tlops of the DM54/74S374 are tsdgts-triggtsred
D-type flip-flops. On the positive transition of the clock, the
Q outputs will be set to the logic states that were set up at
the D inputs.
Schmitt-trigger buffered inputs at the enable/clock lines
simplify system design as ac and dc noise rejection is im-
proved by typically 400 mV due to the input hysteresis. A
buttered output control input can be used to place the eight
outputs in either a normal logic state (high or low logic lev-
els) or a high-impedance state. In the high-impedance state
the outputs neither load nor drive the bus lines significantly.
The output control does not affect the internal operation of
the latches or flip-flops. That is, the old data can be retained
or new data can be entered even while the outputs are off.
Features
" Choice of 8 latches or 8 D-type flip-flops in a single
package
I: TRI-STATE bus-driving outputs
n Full parallet-access for loading
II Buttered control inputs
" P-N-P input reduce D-C loading on data lines
Connection Diagrams
Dual-Ilene Package
ENABLE
Vcr BO " " 'tl " 6D " " G Order Number DM548373J,
120 Irs lu, l" bs l" l" In l" tt DM74S373WM or
‘1 ‘1 (r DM74S373N
o o D 0 a D n a See NS Package Number
OE G Ch-g C) " o: G o-o-o G OE J20A, M208 or N20A
a n o o o o o o
o: a G 0: ea Ft cf? G as
'n r-' c, ru u, l" "1
l: I: la la " lo " Is In lac
owner ttt to m " so an an a: one
CONTROL TL/F/6486-1
Dual-ln-Llne Package
Pee on co m " on so so so moat
v, l" 119 " 113 It: I: " " "
1,sal,] CSI 'eze [1050'] K 7 OrderNumber DM54S3740,
o: 'T"' o: o: Ao-o-q' o: DM74S374WM or
I -T" 1* DM745374N
See NS Package Number
J20A M203 or N20A
a n u It..... o n __o ,
WT ig 1 [,1ii'''tl"fj'i''")
u, r" un H u, r’ H,
l1 la [a lo 5 Is 1 Is " [1n
OUTPUT IO ttt an 20 so an 40 40 am
comm TLfF/6486-2
Absolute Maximum Ratings (Note)
It Mllltary/Aerospaoe specified devices are required,
please contact the National Semiconductor Sales
Oftltte/Dlstrlttutora tor avallablllty and trpeelflttatlttns.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range
DM54S -55'C to + 125°C
DM74S tPC to + 70%
Function Tables
DM54/74S373
Truth Table
Output Enable
Control G D Output
L H H H
L H L L
L L X 00
H X X Z
Storage Temperature Range --65''C to + 15tPC
Note: The 'Wbsolute Maximum Ratings" are those values
beyond which the safety of the device cannot be guaran-
teed. The device should not be operated at these limits. The
parametric values dsfinad in the "Electrical Characteristics"
table are not guaranteed at the absolute maximum ratings.
The "RBtttmtrmmdtsd Operating Conditions" table will define
the condit/bns for actual device operation,
DM54I748374
Truth Table
Output
Control Clock D Output
L t H H
L t L L
L L X 00
H X X Z
H = High Level (Steady State), L = Low Level (Steady State), X " Don't Care
T = Transition from low-to-hlgh level. 2 = High Impedance State
th = The level of the output before steady-state input conditions were establlshed.
Logic Diagrams
DM54/745373
Transparent Latches
OUTPUT (1)
CONTROL i)
ttt D 1
© G - a (2)
20 H D .
D o - a ts)
30 D .
(r-o G - (6)
0 EL so
" (ttl o 4
(r-o G - I (9)
Mt t l D J
r-o E I
6 (12) "
SD (14) D .
0--O -
tl - g (15)
ro "n D .
4 c a - (1a)
0 1f 10
80 (‘8) D
H ii _ m)
ENABLE (11)
c J-"-'tro-
TL/F/6486-3
DM541745374
Posltlve-Edge-Trlggered Fllp-Flops
OUTPUT (H D
CONTROL
'D-----., .
-0 CK I
2D () D .
r-o)tor
Ft E (St "
tt ohctt (e)
6 Aer--'-'-"---"
AO H o
o-o)xor
Ct at) H 40
5D ( l n
"-ohot. ttal
on t , a
o-d CK
- (15)
ro ( , n
>~o>cx
a ts"''' "
no (m o
, "t m)
"is-tr-uh''----
CLOCK J-"-'! 'o--
TL/F16486-4
71.89 0 £185
8373 0 S374
'S373 Recommended Operating Conditions (See Section 1 for Test Waveforms and Output Load)
Symbol Parameter DM54S373 DM745373 Units
Mln Nom Max Mln Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 v
VIH High Level Input Voltage 2 2 V
" Low Level Input Voltage 0.8 0.8 V
IOH High Level Output Current - 2 - 6.5 mA
IOL Low Level Output Current 20 20 mA
tw 'ltd \gidth Ehable 6 6
o 6 igh ns
ES?” 7.3 7.3
tsu Data Setup Time (Notes 1 and 3) O l 0 l ns
tH Data Hold Time (Notes 1 and 3) 10 I 10 l ns
TA Free Air Operating Temperature - 55 125 0 70 'C
Note 1: The symbol (l) indicates the falling edge of the clock pulse is used for reference.
Note 2: CL = 15 pF, RL = 280n, TA = 25''C and Vcc = 5V.
Nola 3: TA = 25''C and Vcc = 5V.
'S373 Electrical Characteristics overrecommendBdtpsratingfreeairttamperature(unlessothwwisenottsd)
Symbol Parameter Condltlons Mln (Note 4) Max Units
V. InputCIamp Voltage Vcc = Min, II = - 18 mA -1.2 V
VOH High Level Output Vcc = Min DM54 2.4 3.4
Voltage lore = Max DM74 2.4 3.2 v
" = Max
VFH = Min
VOL Low Level Output Vcc = Min, IOL = Max 0 5 V
Voltage VIH = Min, " = Max .
ll Input Current © Max Vcc = Max.v. = 5.5V
input Voltage
lm High Level Input Current Vcc = Max, lh = 2.7V 50 p.A
IIL Low Level InputCurrent Vcc = Max,ih = 0.5V -250 FA
IOZH Off-State Output Vcc = Max, Vo = 2.4V
Current with High " = Min, " = Max
Level Output 50 ”A
Voltage Applied
IOZL Oft-State Output Vcc = Max, V0 = 0.5V
Current with Low " = Min, " = Max _
LevelOutput 50 WA
Voltage Applied
los Short Circuit VCC = Max DM54 -40 -100 mA
Output Current (Note 5) DM74 _ 40 -100
ICC Supply Current Vcc = Max Outputs High or Low 105 160 A
Outputs Disabled 190
Note 4: All typicals are at Vcc = 5V, TA = 25"C.
Note 5: Not more than one output should be shorted at a time, and the wration should not exceed one second.
'S373 Switching Characteristics at VCC = 5V and TA = 25°C
(See Section 1 for Test Waveforms and Output Load)
RL = 280tt
From (Input) _
Symbol Parameter To (Output) CL - 15 pF CL - 50 pF Units
Min Max Mln Max
tPLH Propagation Delay Time Low Data to " 14 ns
to High Level Output Any Q
tPHL Propagation Delay Time High Data to 12 16 ns
to Low Level Output Any 0
1pm Propagation Delay Time Low Enable to 14 14 ns
to High Level Output Any Q
tpHL Propagation Delay Time High Enable to 18 21 ns
to Low Level Output Any 0
tPZH Enable Time to Output Control 15 17 ns
High Level Output to Any Q
tsz Output Enable Time to Output Control 18 23 ns
Low Level Output to Any Q
tsz Output Disable Time to Output Control 9 ns
High Level Output (Note I) to Any Q
tpLZ Output Disable Tuna to Output Control 1 2 ns
Low Level Output (Note 1) to Any Q
NotettCc = 5 pF
'S374 Recommended Operating Conditions
(See Section 1 for Test Waveforms and Output Load)
Symbol Parameter DM545374 DM745374 Units
Min Nom Max Min Nom Max
Vcc Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High Level Input Voltage 2 V
" Low Level Input Voltage 0.8 0.8 V
lor, High Level Output Current - 2 - 6.5 mA
kh. Low Level Output Current 20 20 mA
tcLK Clock Frequency (Note 2) o 100 75 0 100 75 MHz
fCLK Clock Frequency (Note 3) 0 100 75 O 100 75 MHz
tw Pulse Width Clock 6 6
(Note 2) High
Clock 7.3 7.3
Pulse Width Clock
(Note 3) High 15 15
Clock 15 1 5
tsu Data Setup Time (Notes 1 and 4) 5 t 5 t ns
tH Data Hold Time (Notes 1 and 4) 2 t 2 t ns
TA Free Air Operating Temperature - 55 125 o 70 ''C
Not. It The symbol It) indicates the rising edge of the clock pulse is used for reference.
Not. 2: ck. = 15 pF, RL = 2800. TA - 25°C and Voc = 5V.
Hon 3: CL = 50 pF, RL = Mon, TA -- 25'0 and Vcc " 5V.
N010 4:1). = 25'C and Vcc - SV.
VLSS 0 8183
$373 0 $374
'S374 Electrical Characteristics
over recommended operating free air temperature (unless otherwise noted)
. . Typ
Symbol Parameter Conditions Min (Note 1) Max Units
V. InputClamp Voltage Vcc = Min, II = ~18 mA -1.2 V
VOH High Level Output Voc = Min DM54 2.4 3.4
Voltage loss = Max DM74 2.4 3.2 v
VIL = Max
v.H = Min
VOL Low Level Output Voc = Min, IOL = Max 0 5 V
Voltage I/m = Min,V|L = Max .
II InputCurrent @ Max Vcc = Max, V. = 5.5V 1 m A
Input Voltage
IH High Level Input Vcc = Max, VI = 2.7V
Current 50 ”A
lit. Low Level Input Vcc = Max, V. = 0.5V -
Current 250 ”A
IOZH Off-State Output Vcc =.. Max, vo = 2.4V
Current with High VIH = Min, Vit. = Max 50 A
Level Output "
Voltage Applied
IOZL Off-State Output VCC = Max, Vo = 0.5V
Current with Low VIH = Min, W. = Max -50 A
Level Output "
Voltage Applied
log Short Circuit Vcc = Max DM54 -40 - 100 m A
Output Current (Note 2) DM74 - 40 - 100
Ice Supply Current Vcc = Max Outputs High 110
Outputs Low 90 140 mA
Outputs Disabled 160
Nola 1: M Iypicals are at Vcc = 51/, TA = 25'C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second.
'S374 Switching Characteristics athc = 5V and TA = 25'C
(See Section 1 for Test Waveforms and Output Load)
RL = 280tt
s b I P t From (input) C F F .
ym o arame er To (Output) L - 15 p CL - 50 p Units
Min Max Mln Max
fMAx Maximum Clock Frequency 75 75 MHz
tpLH Propagation Delay Time Low Clock to 15 1 5 ns
to High Level Output Any 0
tpHL Propagation Delay Time High Clock to 17 20 ns
to Low Level Output Any Q
tsz Output Enable Time to Output Control 1 5 17 as
High Level Output to Any a
tp2L Output Enable Time to Output Control 1 8 23 ns
Low Levei Output to Any Q
tsz Output Disable Time from Output Control 9 ns
High Level Output (Note 1) to Any Q
tpLz Output Disable Time from Output Control 1 2 ns
Low Level Output (Note 1) to Any Q
NM01:CL = 5pF
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
DM74S374WM - product/dm74s374wm?HQS=T|-nu|I-null-dscataIog-df-pf-null-wwe
DM74S373WM - product/dm743373wm?HQS=T|-nu|I-null-dscatalog-df-pf-nuIl-wwe
DM74S373N - product/dm74s373n?HQS=T|-nulI-nulI-dscatalog-df-pf-nuIl-wwe
DM54S374J - product/dm54s374j?HQS=T|-nu|I-nulI—dscatalog-df—pf—nuII-wwe
DM54S373J - product/dm545373j?HQS=T|-nu|I-nulI-dscatalog-df-pf-nuII-wwe
DM74S374N - product/dm74s374n?HQS=T|-nu|I-nulI-dscatalog-df-pf-nuIl-wwe
