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DM54LS365AJ
Hex TRI-STATE Buffers
TL/F/6427
54LS365A/DM54LS365A/DM74LS365A
Hex
TRI-STATE
Buffers
June 1989
54LS365A/DM54LS365A/DM74LS365A
Hex TRI-STATEÉ Buffers
General Description
This device containssix independent gates eachof which
performsa non-inverting buffer function. The outputs have
the TRI-STATE feature. When enabled,the outputs exhibit
thelow impedance characteristicsofa standardLS output
with additional drive capabilityto permitthe drivingofbus
lines without external resistors. When disabled, boththe
output transistorsare turnedoff presentinga high-imped-
ance statetothebus line. Thus theoutput willact neitheras significant loadnorasa driver.To minimizethe possibility
thattwo outputswill attemptto takea commonbusto oppo-
site logic levels,the disable timeis shorter thanthe enable
timeofthe outputs.
Features Alternate Military/Aerospace device (54LS365A)is
available. Contacta National Semiconductor SalesOf-
fice/Distributorfor specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6427–1
Order Number 54LS365ADMQB, 54LS365AFMQB, 54LS365ALMQB,
DM54LS365AJ, DM54LS365AW,DM74LS265AMor DM74LS365AN
SeeNS Package Number E20A, J16A, M16A, N16Eor W16A
Function TableeA
Input Output
G1G2A Y X X Hi-Z H X Hi-Z H H L LeHigh Logic LeveleLow Logic Levele EitherLow orHighLogicLevel
Hi-Ze TRI-STATE (Outputsare disabled)
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
