DM54LS174J ,Hex/Quad D Flip-Flops with ClearApplications include:ments is transferred to the Q outputs on the positive-goingBuffer/storage regi ..
DM54LS174J ,Hex/Quad D Flip-Flops with ClearApplications include:ments is transferred to the Q outputs on the positive-goingBuffer/storage regi ..
DM54LS191J ,Synchronous 4-Bit Up/Down Counters with Mode ControlFeaturesYhigh, it counts down. Counts 8-4-2-1 BCD or binaryYThese counters are fully programmable; ..
DM54LS240J ,Octal TRI-STATE Buffers/Line Drivers/Line ReceiversDM54LS240/DM74LS240,DM54LS241/DM74LS241OctalTRI-STATEBuffers/LineDrivers/LineReceiversApril1992DM54 ..
DM54LS240J/883 ,Octal TRI-STATE Buffer/Line Driver/Line Receiver (Inverting)DM54LS240/DM74LS240,DM54LS241/DM74LS241OctalTRI-STATEBuffers/LineDrivers/LineReceiversApril1992DM54 ..
DM54LS240J/883 ,Octal TRI-STATE Buffer/Line Driver/Line Receiver (Inverting)FeaturesYTypical power dissipation (enabled)YTRI-STATE outputs drive bus lines directlyInverting 13 ..
DS1647 ,Nonvolatile Timekeeping RAMFEATURES PIN CONFIGURATIONS Integrates NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail Co ..
DS1647-120+ ,Nonvolatile Timekeeping RAM19-5596; Rev 10/10 DS1647/DS1647P Nonvolatile Timekeeping RAM
DS1647P-120 ,Nonvolatile Timekeeping RAMFEATURES PIN CONFIGURATIONS Integrates NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail Co ..
DS1647P-120 ,Nonvolatile Timekeeping RAMFEATURES PIN CONFIGURATIONS Integrates NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail Co ..
DS1647P-120 ,Nonvolatile Timekeeping RAMFEATURES PIN CONFIGURATIONS Integrates NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail Co ..
DS1647P-120+ ,Nonvolatile Timekeeping RAMFEATURES PIN CONFIGURATIONS Integrates NV SRAM, Real-Time Clock, TOP VIEW Crystal, Power-Fail Co ..
DM54LS174J
Hex/Quad D-Type Flip-Flops with Clear
TL/F/6404
54LS174/DM54LS174/DM74LS174,
54LS175/DM54LS175/DM74LS175
Hex/Quad
Flip-Flops
with
Clear
June 1989
54LS174/DM54LS174/DM74LS174,
54LS175/DM54LS175/DM74LS175
Hex/QuadD Flip-Flops with Clear
General Description
These positive-edge-triggered flip-flops utilize TTL circuitry implement D-type flip-flop logic.All havea direct clear
input,andthe quad (175) versions feature complementary
outputs from each flip-flop.
InformationattheD inputs meetingthe setup time require-
mentsis transferredtotheQ outputsonthe positive-going
edge ofthe clockpulse. Clock triggering occursata particu-
lar voltage levelandisnot directly relatedtothe transition
timeofthe positive-going pulse. Whenthe clock inputisat
eitherthe highorlow level,theD input signalhasno effectthe output.
Features LS174 containssix flip-flops with single-rail outputs LS175 contains four flip-flops with double-rail outputs Buffered clockand direct clear inputs Individual data inputto each flip-flop Applications include:
Buffer/storage registers
Shift registers
Pattern generators Typical clock frequency40 MHz Typical power dissipationper flip-flop14 mW Alternate Military/Aerospace device (54LS174,
54LS175)is available. Contacta National Semiconduc-
tor Sales Office/Distributorfor specifications.
Connection Diagrams
Dual-In-Line Package
TL/F/6404–1
Order Number 54LS174DMQB, 54LS174FMQB,
54LS174LMQB,DM54LS174J,
DM54LS174W, DM74LS174Mor DM74LS174N
SeeNS Package Number E20A, J16A,
M16A, N16Eor W16A
Dual-In-Line Package
TL/F/6404–2
Order Number 54LS175DMQB, 54LS175FMQB,
54LS175LMQB, DM54LS175J
DM54LS175W, DM74LS175MorDM74LS175N
SeeNS Package Number E20A, J16A,
M16A,N16EorW16A
Function Table (EachFlip-Flop)
Inputs Outputs
Clear Clock D Q Q² X L H u HH L u LL H X Q0 Q0eHigh Level (steadystate)eLow Level (steadystate)e Don’tCaree TransitionfromlowtohighleveleThe levelofQbeforetheindicated steady-stateinputconditionswere
established.e LS175only
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
