DAC5687MPZPEP ,Enhanced Product 16-Bit 500 Msps 2X-8X Interpolating Dual-Channel Dac 100-HTQFP -55 to 125features andsuperior linearity, noise, crosstalk, and phase-lockedand Phaseloop (PLL) noise perform ..
DAC5687MPZPEP ,Enhanced Product 16-Bit 500 Msps 2X-8X Interpolating Dual-Channel Dac 100-HTQFP -55 to 125FEATURES APPLICATIONS• Cellular Base Transceiver Station Transmit• Controlled BaselineChannel– One ..
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DAC5687MPZPEP
Enhanced Product 16-Bit 500 Msps 2X-8X Interpolating Dual-Channel Dac
www.ti.com
FEATURES APPLICATIONS
DESCRIPTION
DAC5687-EP
SGLS333–JUNE 2006
16-BIT 500-MSPS 2×–8× INTERPOLATING DUAL-CHANNEL
DIGITAL-TO-ANALOG CONVERTER (DAC) Cellular Base Transceiver Station Transmit•
Controlled Baseline
Channel– One Assembly – CDMA: W-CDMA, CDMA2000, TD-SCDMA– One Test Site – TDMA: GSM, IS-136, EDGE/UWC-136– One Fabrication Site – OFDM: 802.16•
Extended Temperature Performanceof •
Cable Modem Termination System–55°Cto 125°C Enhanced Diminishing Manufacturing
Sources (DMS) Support The DAC5687isa dual-channel 16-bit high-speed•
Enhanced Product-Change Notification digital-to-analog converter (DAC) with integrated 2×,•
Qualification Pedigree(1) 4×, and8× interpolation filters,a complex numerically
controlled oscillator (NCO), on-board clock multiplier,•
500 MSPS compensation, and on-chip voltage reference.•
Selectable 2×–8× Interpolation The DAC5687is pin compatibleto the DAC5686,•
On-Chip PLL/VCO Clock Multiplier requiring only changesin register settings for most
applications, and offers additional features and•
FullIQ Compensation Including Offset, Gain,superior linearity, noise, crosstalk, and phase-locked
and Phaseloop (PLL) noise performance.•
Flexible Input OptionsThe DAC5687 has six signal processing blocks: two
– FIFO With Latch on Externalor Internal interpolate by two digital filters,a fine-frequency
Clock mixer with 32-bit NCO,a quadrature modulation
– Even/Odd Multiplexed Input compensation block, another interpolate by two
Single-Port Demultiplexed Input digital filter, anda coarse-frequency mixer with Fs/2 Fs/4. The different modesof operation enableor•
Complex Mixer With 32-Bit Numerically bypass the signal processing blocks.
Controlled Oscillator (NCO)The coarse and fine mixers canbe combinedto span•
Fixed-Frequency Mixer With Fs/4 and Fs/2 wider rangeof frequencies with fine resolution. The•
1.8-Vor 3.3-V I/O Voltage DAC5687 allows both complex or real output.•
On-Chip 1.2-V Reference Combining the frequency upconversion and complex
output producesa Hilbert Transform pair thatis•
Differential Scalable Output:2 mAto20 mAoutput from the two DACs. An external RF•
Pin Compatibleto DAC5686 quadrature modulator then performs the final single•
High Performance sideband upconversion.
81-dBc Adjacent Channel Leakage Ratio The IQ compensation feature allows optimizationof
(ACLR) WCDMA TM1at 30.72 MHz phase, gain, and offset to maximize sideband
– 72-dBc ACLR WCDMA TM1at 153.6 MHz rejection and minimize LO feedthrough for an analog
quadrature modulator.
100-Pin HTQFP qualificationin accordance with JEDEC and standardsto ensure reliable operation overan useofthis
performance and environmental limits.