DAC16 Fast Delivery |IC PHOENIX CO.,LIMITED

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DAC16
16-Bit High Speed Current-Output DAC
REV.B16-Bit High Speed
Current-Output DAC
FUNCTIONAL BLOCK DIAGRAM
CCOMP
IOUT
DB0 (LSB)DB15 (MSB)
IREF
REF GND
VCC
AGND
VEE
DGND
GENERAL DESCRIPTION
The DAC16 is a 16-bit high speed current-output digital-to-
analog converter with a settling time of 500 ns. A unique com-
bination of low distortion, high signal-to-noise ratio, and high
speed make the DAC16 ideally suited to performing waveform
synthesis and modulation in communications, instrumentation,
and ATE systems. Input reference current is buffered, with full-
scale output current of 5 mA. The 16-bit parallel digital input
bus is TTL/CMOS compatible. Operating from +5 V and
–15 V supplies, the DAC16 consumes 190 mW (typ) and is
available in a 24-lead epoxy DIP, epoxy surface-mount small
outline (SOL), and in die form.
FEATURES
61 LSB Differential Linearity (max)
Guaranteed Monotonic Over Temperature Range
62 LSB Integral Linearity (max)
500 ns Settling Time
5 mA Full-Scale Output
TTL/CMOS Compatible
Low Power: 190 mW (typ)
Available in Die Form
APPLICATIONS
Communications
ATE
Data Acquisition Systems
High Resolution Displays
Figure 1.DAC16 Settling Time Accuracy vs. Percent of
Full Scale
DAC16–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
SUPPLY CHARACTERISTICS
NOTESAll supplies can be varied –5% and operation is guaranteed. Device is tested with nominal supplies.Operation is guaranteed over this reference range, but linearity is neither tested not guaranteed (see Figures 7 and 8).
Specifications subject to change without notice.
WAFER TEST LIMITS
Logic Input Low Voltage
Logic Input Current
Positive Supply Current
Negative Supply Current
(@ VCC = +5.0 V, VEE = –15.0 V, IREF = 0.5 mA, CCOMP = 47 mF, TA = Full Operating Tem-
perature Range unless otherwise noted. See Note 1 for supply variations.)
(@ VCC = +5.0 V, VEE = –15.0 V, IREF = 0.5 mA, CCOMP = 47 mF, TA = +258C unless otherwise noted.)
CAUTIONStresses above those listed under “Absolute Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation at or above this
specification is not implied. Exposure to the above maximum
rating conditions for extended periods may affect device
reliability.Digital inputs and outputs are protected; however, perma-
nent damage may occur on unprotected units from high en-
ergy electrostatic fields. Keep units in conductive foam or
packaging at all times until ready to use. Use proper anti-
static handling procedures.Remove power before inserting or removing units from their
sockets.
PIN CONFIGURATION
24-Lead DIP (P, S)
IREFCCOMP
DGND
VCC
DB15 (MSB)
DB14
DB13
DB12
DB11
DB10
DB9
DB8
DB7
IOUT
AGND
REF GND
VEE
DB0 (LSB)
DB1
DB2
DB3
DB4
DB5
DB6
PIN DESCRIPTION
ORDERING GUIDE
ABSOLUTE MAXIMUM RATINGS
(TA = +25°C unless otherwise noted)
VCC to VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +25.0 V
VCC to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7.0 V
VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –18.0 V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +0.3 V
REF GND to AGND . . . . . . . . . . . . . . . . . . . –0.3 V, +1.0 V
IREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA
Analog Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 8 mA
Digital Input Voltage to DGND . . . . . . . . . . . . . . . . . . . £VCC
Operating Temperature Range
FP, FS . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Dice Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
NOTEqJA is specified for worst case mounting conditions, i.e., qJA is specified for
device in socket.
DICE CHARACTERISTICS
VCCDGNDIREFCCOMPIOUTAGND
REF GND
VEE
DB0 (LSB)
DB1
DB2
DB3
DB4DB5DB6DB7DB8DB9
DB10
DB11
DB12
DB13
DB14
DB15 (MSB)
Die Size 0.129 x 0.153 inch, 19,737 sq. mils
(3.277 x 3.886 mm, 12.73 sq. mm)
The DAC16 Contains 330 Transistors.
Substrate is VEE Polarity.
DAC16
+5V
–15V
Figure 2. Burn-In Diagram
OPERATION
Novel DAC Architecture
The DAC16 was designed with a compound DAC architecture
to achieve high accuracy, excellent linearity, and low transition
errors. As shown in Figure 3, the DAC’s five most-significant
bits utilize 31 identical segmented current sources to obtain
optimal high speed settling at major code transitions. The lower
nine bits utilize an inverted R-2R ladder network which is laser-
trimmed to ensure excellent differential nonlinearity. The middle
two bits (DB9 and DB10) arc binary-weighted and scaled from
the MSB segments. Note that the flow of output current is into
the DAC16—there is no signal inversion. As shown, the switches
for each current source are essentially diodes. It is for this rea-
son that the output voltage compliance of the DAC16 is limited
to a few millivolts. The DAC16 was designed to operate with an
operational amplifier configured as an I–V converter; therefore,
the DAC16’s output must be connected to the sum node of an
operational amplifier for proper operation. Exceeding the output
voltage compliance of the DAC16 will introduce linearity errors.
The reference current buffer assures full accuracy and fast set-
tling by controlling the MSB reference node. The 16-bit paral-
lel digital input is TTL/CMOS compatible and unbuffered,
minimizing the deleterious effects of digital feedthrough
while allowing the user to tailor the digital interface to
the speed requirements and bus configuration of the
application.
Equivalent Circuit Analysis
An equivalent circuit for static operation of the DAC16 is
illustrated in Figure 4. IREF is the current applied to the
DAC16 and is set externally to the device by VREF and
RREF. The output capacitance of the DAC16 is approxi-
mately 10 pF and is code independent. Its output resis-
tance RO is code dependent and is given by:
where
DB9 = State of Data Bit 9 = 0 or 1;
DB10 = State of Data Bit 10 = 0 or 1; and
X = Decimal representation of the 5 MSBs (DB11–DB15)
= 0 to 31.
IOUT
IOUT = 8 • IREF
RO = SEE TEXT
CO = 10pF
65,535 Digital Code
65,536
Figure 4.Equivalent Circuit for the DAC16
Table I provides the relationship between the input digital
code and the output resistance of the DAC16.
Table I.DAC16 Output Resistance vs. Digital Code
DB0 – DB15
SWITCH DETAIL
FROM
SWITCH
DECODER
IREF
IOUT
AGND
CCOMP
Figure 3.DAC16 Architecture
Digital Input Considerations
The threshold of the DAC16’s digital input circuitry is set at
1.4 V, independent of supply voltage. Hence, the digital inputs
can interface with any type of 5 V logic. Illustrated in Figure 5 is
the equivalent circuit of the digital inputs. Note that the indi-
vidual input capacitance is approximately 7 pF.
TO DAC
SWITCH
+5V+0.7V
–15V–0.7V
DBX
Figure 5.Equivalent Circuit of a DAC16 Digital Input
This input capacitance can be used in conjunction with an ex-
ternal R-C circuit for digital signal deskewing, if required. In
applications where some of the DAC16’s digital inputs are
not used, the recommended procedure to turn off one or more
inputs is to connect each input line to +5 V as shown in
Figure 6.
DB0
DB1
+5V
DAC16
Figure 6.Handling Unused DAC16 Digital Inputs
REFERENCE CURRENT – mA
DIFFERENTIAL NONLINEARITY – LSB
2.0
Figure 8.Differential Nonlinearity
vs. IREF
TEMPERATURE – 8C
INTEGRAL NONLINEARITY – LSB
–40–4–20020406080
Figure 11.Integral Nonlinearity
vs. Temperature
TEMPERATURE – 8C
ZERO SCALE – LSB
0.2–20020406080
Figure 9.Zero Scale Output vs.
Temperature
TEMPERATURE – 8C
DIFFERENTIAL NONLINEARITY – LSB
1.0
Figure 12.Differential Nonlinearity
vs. Temperature
REFERENCE CURRENT – mA
INTEGRAL NONLINEARITY – LSB
0.30.40.50.60.7
Figure 7.Integral Nonlinearity vs. IREF
TEMPERATURE – 8C
GAIN ERROR – LSB
–10
Figure 10.Gain Error vs.
Temperature
DAC16–Typical Performance Characteristics
APPLICATIONS
Power Supplies, Bypassing, and Grounding
All precision converter products require careful application of
good grounding practices to maintain full-rated performance. As
is always the case with analog circuits operating in digital envi-
ronments, digital noise is prevalent; therefore, special care must
be taken to ensure that the DAC16’s inherent precision is main-
tained. This means that particularly good engineering judgment
should be exercised when addressing the power supply, ground-
ing, and bypassing issues using the DAC16.
The DAC16 was designed to operate from +5 V and –15 V
supplies. The +5 V supply primarily powers the digital portion
of the DAC16 and can consume 20 mA, maximum. Although
very little +5 V supply current is used by the reference amplifier,
large amounts of digital noise present on the +5 V supply can
introduce analog errors. It is, therefore, very important that the
+5 V supply be well filtered and regulated. The –15 V supply
provides most of the current for the reference amplifier and all
of the current for the internal DAC. Although the maximum
current in this supply is 10 mA, it must provide a low imped-
The DAC16 includes two ground connections in order to mini-
mize system accuracy degradation arising from grounding er-
rors. The two ground pins are designated DGND (Pin 2) and
AGND (Pin 22). The DGND pin is the return for the digital
circuit sections of the DAC and serves as their input threshold
reference point. Thus, DGND should be connected to the same
ground as the circuitry that drives the digital inputs.
Pin 22, AGND, serves as the reference point for the 9-bit
lower-order DAC as well as the common for the reference am-
plifier, REFGND (Pin 21). This pin should also serve as the
reference point for all analog circuitry associated with the
DAC16. Therefore, to minimize any errors, it is recommended
that AGND connection on the DAC16 be connected to a high
quality analog ground. If the system contains any analog signal
path carrying a significant amount of current, then that path
should have its own return connection to Pin 22.
It is often advisable to maintain separate analog and digital
grounds throughout a complete system, tying them common to
one place only. If the common tie point is remote and an acci-
TEMPERATURE – 8C
SUPPLY CURRENT – mA
–400–20020406080
Figure 13. Supply Current vs.
Temperature
BURN-IN TIME – Hours
DIFFERENTIAL NONLINEARITY – LSB
20040060080010001200
Figure 16.Differential Nonlinearity
vs. Time Accelerated by Burn-In
LOGIC INPUT VOLTAGE – V
ALL DATA BITS
– mA015234
Figure 14. VCC Supply Current vs.
Logic Input Voltage, All Data Bits
BURN-IN TIME – Hours
INTEGRAL NONLINEARITY – LSB
20040060080010001200
Figure 17.Integral Nonlinearity vs
Time Accelerated by Burn-In
TEMPERATURE – 8C
LOGIC BIT CURRENT –
–40–20020406080
Figure 15.Digital Input Current vs.
Temperature
BURN-IN TIME – Hours
GAIN ERROR – LSB
20040060080010001200
Figure 18.Gain Error vs. Time
Accelerated by Burn-In

Partno	Mfg	Dc	Qty	Available	Descript
DAC16	AD ?	N/a	59	avai	16-Bit High Speed Current-Output DAC