CY7C1623KV18-333BZXC ,144-Mbit DDR-II SIO SRAM Two-Word Burst ArchitectureBlock Diagram – CY7C1623KV1818D[17:0]Write WriteData Reg Data Reg22 AddressA(21:0)RegisterLDKContro ..
CY7C1625KV18-300BZXC ,144-Mbit QDR?II SRAM Two-Word Burst ArchitectureBlock Diagram – CY7C1625KV189D[8:0]Write Write23AddressAReg Reg(22:0)Register23 AddressA(22:0)Regis ..
CY7C1625KV18-333BZXC ,144-Mbit QDR?II SRAM Two-Word Burst ArchitectureFeatures Configurations Separate independent read and write data ports CY7C1625KV18 – 16 M × 9❐ Sup ..
CY7C164-15PC ,16K x 4 Static RAMFeaturesEnable (OE) feature. Both devices have an automatic power- High speed down feature, reduci ..
CY7C164-15VC ,16K x 4 Static RAMBlock Diagram Pin ConfigurationsSOJDIPTop ViewTop ViewA V A V5 1 22 CC 5 1 24 CCA A A A6 2 21 4 6 4 ..
CY7C164-20PC ,16K x 4 Static RAMFunctional DescriptionThe I/O pins stay in a high-impedance state when Chip EnableThe CY7C164 and C ..
D5C031-50 , 300 gate CMOS pld
D5C031-50 , 300 gate CMOS pld
D5C032-30 , 8-MACROCELL CMOS PLD
D5C032-35 , 8-MACROCELL CMOS PLD
D5C032-40 , 8-MACROCELL CMOS PLD
D5C090-60 , 24 MACROCELL CMOS PLD
CY7C1623KV18-250BZXC-CY7C1623KV18-333BZXC
