CY7C1613KV18-300BZXC ,144-Mbit QDR?II SRAM Four-Word Burst ArchitectureFunctional Description Four-word burst for reducing address bus frequency The CY7C1613KV18, and CY7 ..
CY7C1613KV18-333BZXC ,144-Mbit QDR?II SRAM Four-Word Burst ArchitectureBlock Diagram – CY7C1615KV1836D[35:0]Write Write Write Write20AddressAReg Reg Reg Reg(19:0)Register ..
CY7C1614KV18-300BZC ,144-Mbit QDR?II SRAM Two-Word Burst ArchitectureFunctional Description Double data rate (DDR) interfaces on both read and write portsThe CY7C1625KV ..
CY7C1614KV18-333BZC ,144-Mbit QDR?II SRAM Two-Word Burst ArchitectureBlock Diagram – CY7C1625KV189D[8:0]Write Write23AddressAReg Reg(22:0)Register23 AddressA(22:0)Regis ..
CY7C1615KV18-250BZXC ,144-Mbit QDR?II SRAM Four-Word Burst ArchitectureBlock Diagram – CY7C1613KV1818D[17:0]WriteWrite Write Write21AddressARegReg Reg Reg(20:0)Register21 ..
CY7C1615KV18-333BZXC ,144-Mbit QDR?II SRAM Four-Word Burst ArchitectureCharacteristics . 24Write Cycle Descriptions ..10 Switching Waveforms ....... 26Write Cycle Descrip ..
D5C031-50 , 300 gate CMOS pld
D5C031-50 , 300 gate CMOS pld
D5C032-30 , 8-MACROCELL CMOS PLD
D5C032-35 , 8-MACROCELL CMOS PLD
D5C032-40 , 8-MACROCELL CMOS PLD
D5C090-60 , 24 MACROCELL CMOS PLD
CY7C1613KV18-300BZXC-CY7C1613KV18-333BZXC-CY7C1615KV18-250BZXC-CY7C1615KV18-333BZXC
