CY7C1545KV18-400BZC ,72-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)Functional Description Double Data Rate (DDR) interfaces on both read and write portsThe CY7C1543KV ..
CY7C1545KV18-400BZXI ,72-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)Characteristics . 23Write Cycle Descriptions ....9 Switching Waveforms ....... 24Write Cycle Descri ..
CY7C1548KV18-400BZC ,72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)Characteristics . 22Write Cycle Descriptions ....8 Switching Waveforms ....... 23Write Cycle Descri ..
CY7C1548KV18-400BZXC ,72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)Features Configurations 72-Mbit density (4 M × 18, 2 M × 36) With Read Cycle Latency of 2.0 cycles: ..
CY7C1548KV18-450BZC , 72-Mbit DDR II SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1550KV18-400BZC ,72-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.0 Cycle Read Latency)Functional Description900 MHz) at 450 MHz The CY7C1548KV18, and CY7C1550KV18 are 1.8V Available in ..
D5C031-50 , 300 gate CMOS pld
D5C031-50 , 300 gate CMOS pld
D5C032-30 , 8-MACROCELL CMOS PLD
D5C032-35 , 8-MACROCELL CMOS PLD
D5C032-40 , 8-MACROCELL CMOS PLD
D5C090-60 , 24 MACROCELL CMOS PLD
CY7C1543KV18-400BZC-CY7C1545KV18-400BZC-CY7C1545KV18-400BZXI
