CY7C1243KV18-400BZC ,36-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)Functional Description Double data rate (DDR) interfaces on both read and write ports The CY7C1243K ..
CY7C1243KV18-450BZC ,36-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)Block Diagram – CY7C1245KV1836D[35:0]Write Write Write Write18AddressAReg Reg Reg Reg(17:0)Register ..
CY7C12451KV18-400BZXC , 36-Mbit QDR® II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
CY7C1245KV18-400BZC ,36-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)Features Configurations Separate independent read and write data ports With Read Cycle Latency of 2 ..
CY7C1245KV18-400BZXC ,36-Mbit QDR?II+ SRAM Four-Word Burst Architecture (2.0 Cycle Read Latency)Characteristics . 24Write Cycle Descriptions ..10 Switching Waveforms ....... 25Write Cycle Descrip ..
CY7C12481KV18-400BZC , 36-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
D38NH02L , N-channel 24V - 0.011ohm - 38A - DPAK/IPAK STripFET TM III Power MOSFET
D3FJ10 , Schottky Barrier Diode
D3FJ10 , Schottky Barrier Diode
D3FP3 , Schottky Rectifiers (SBD) (30V 3A)
D3L60 , Super Fast Recovery Rectifiers(600V 3A)
D3S4M , Schottky Rectifiers (SBD) (40V 3A)
CY7C1243KV18-400BZC-CY7C1243KV18-450BZC-CY7C1245KV18-400BZC-CY7C1245KV18-400BZXC
