CY74FCT821CTQCT ,10-Bit Bus Interface Flip-Flops with 3-State Outputslogic diagram (positive logic)1OE13CPC023YQ02DD00To Nine Other Channels2POST OFFICE BOX 655303 • DA ..
CY74FCT821CTQCT ,10-Bit Bus Interface Flip-Flops with 3-State Outputsmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CY74FCT821CTQCT ,10-Bit Bus Interface Flip-Flops with 3-State Outputs/sc/package.FUNCTION TABLEINTERNALINPUTSOUTPUTSFUNCTIONOE D CP Q YH X ↑ L Z ZH L ↑ L ZH H ↑ H ZLoad ..
CY74FCT825CTQCT ,8-Bit Bus Interface Flip-Flops with 3-State OutputsCY74FCT825T 8-BIT BUS-INTERFACE REGISTERWITH 3-STATE OUTPUTSSCCS070A – OCTOBER 2001 – REVISED NOVE ..
CY74FCT827ATQCT ,10-Bit Buffers/Drivers with 3-State Outputslogic diagram (positive logic)1OE113OE2223DY00To Nine Other ChannelsPin numbers shown are for the Q ..
CY74FCT827ATSOC ,10-Bit Buffers/Drivers with 3-State Outputselectrical characteristics over recommended operating free-air temperature range (unlessotherwise n ..
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D2213 , METAL GATE RF SILICON FET
D2220UK , METAL GATE RF SILICON FET
D2300 , 1.3 mm D2300-Type Laser Isolated DFB Laser Module
D240505ND-1W , TWIN OUTPUT DC-DC CONVERTER
D240505NS-1W , TWIN OUTPUT DC-DC CONVERTER
CY74FCT821ATQCT-CY74FCT821CTQCT
10-Bit Bus Interface Flip-Flops with 3-State Outputs
Significantly Improved Noise
Characteristics Ioff Supports Partial-Power-Down Mode
Operation Matched Rise and Fall Times Fully Compatible With TTL Input and
Output Logic Levels ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101) 64-mA Output Sink Current
32-mA Output Source Current High-Speed Parallel Register With
Positive-Edge-Triggered D-Type Flip-Flops 3-State Outputs
descriptionThis bus-interface register is designed to eliminate the extra packages required to buffer existing registers and
provide extra data width for wider address/data paths or buses carrying parity. The CY74FCT821T is a
10-bit-wide buffered version of the popular CY74FCT374 function. This device is ideal for use as an output port
requiring high IOL/IOH.
This device is designed for high-capacitance load drive capability, while providing low-capacitance bus loading
at both inputs and outputs. Outputs are designed for low-capacitance bus loading in the high-impedance state.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTIONPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.259
GND259
