CY74FCT16500CTPVC ,18-Bit Universal Bus Transceivers with 3-State OutputsMaximum RatingsPin Summary(Above which the useful life may be impaired. For userName Descriptiongui ..
CY74FCT16500CTPVCT ,18-Bit Universal Bus Transceivers with 3-State OutputsFunctional Description• FCT-C speed at 4.6 ns These 18-bit universal bus transceivers can be operat ..
CY74FCT16501ATPVC ,18-Bit Universal Bus Transceivers with 3-State OutputsMaximum RatingsPin Description(Above which the useful life may be impaired. For userName Descriptio ..
CY74FCT16501ATPVC ,18-Bit Universal Bus Transceivers with 3-State OutputsElectrical Characteristics Over the Operating Range[8]Parameter Description Test Conditions Min. Ty ..
CY74FCT16501ETPAC ,18-Bit Universal Bus Transceivers with 3-State OutputsFunctional Description•I supports partial-power-down mode operation These 18-bit universal bus tran ..
CY74FCT16543TPVC ,16-Bit Registered Transceivers with 3-State OutputsBlock Diagrams Pin ConfigurationOEBA1Top ViewCEBA1SSOP/TSSOPLEBA1OEAB OEBA1 1 56 1OEAB12 55LEAB LEB ..
D1FK70-5063 , 700V 0.8A
D1FL20 , Super Fast Recovery Rectifiers(200V 1.1A)
D1FL20U , Super Fast Recovery Rectifiers(200V 1.1A)
D1FL20U , Super Fast Recovery Rectifiers(200V 1.1A)
D1FL20U , Super Fast Recovery Rectifiers(200V 1.1A)
D1FM3 , SCHOTTKY RECTIFIERS
CY74FCT16500CTPVC-CY74FCT16500CTPVCT
18-Bit Universal Bus Transceivers with 3-State Outputs 56-SSOP -40 to 85
Features FCT-C speed at 4.6 nsoff supports partial-power- mode operation Edge-rate control circuitry for significantly improved
noise characteristics Typical output skew < 250 ps ESD > 2000V TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages Industrial temperature range of −40˚C to +85˚C
CC = 5V ± 10%
CY74FCT16500T Features:
64 mA sink current, 32 mA source current Typical V OLP (ground bounce) <1.0V at VCC = 5V,A = 25˚CCY74FCT162500T Features:
Balanced 24 mA output drivers Reduced system switching noise Typical V OLP (ground bounce) <0.6V at VCC = 5V,A = 25˚C
Functional DescriptionThese 18-bit universal bus transceivers canbe operatedin
transparent, latched,or clock modesby combining D-type
latches and D-type flip-flops. Data flowin each directionis
controlledby output-enable (OEAB and OEBA), latch enable
(LEAB and LEBA), and clock inputs (CLKAB and CLKBA)
inputs. For A-to-B data flow, the device operatesin transparent
mode when LEABis HIGH. When LEABis LOW, theA datais
latchedif CLKABis heldata HIGHor LOW logic level.If LEAB LOW, theA bus datais storedin the latch/flip-flopon the
HIGH-to-LOW transitionof CLKAB. OEAB performs theoutput
enable functionon theB port. Data flow from B-to-Ais similar thatof A-to-B andis controlled by OEBA, LEBA, and
CLKBA.
This device is fully specified for partial-power-down
applications usingIoff. TheIoff circuitry disables the outputs,
preventing damaging current backflow through the device
when it is powered down.
The CY74FCT16500T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162500T has 24-mA balanced output drivers
with current limiting resistorsin the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162500T is ideal for driving transmission lines.
