CY2412SC-1 ,MPEG Clock Generator with VCXOBlock Diagram Pin ConfigurationCY2412-1,-38-pin SOICCLKC13.5 XINOUTPUTOSCQΦ CLKBXOUT DIVIDERS 1 XOU ..
CY2412SXC-1 ,MPEG Clock Generator with VCXOFeatures Benefits• Integrated phase-locked loop (PLL) • Highest-performance PLL tailored for multim ..
CY24130ZXC-1 ,HOTLink SMPTE Receiver Training ClockBlock DiagramXINQOSC.ΦXOUT VCO OUTPUTMULTIPLEXERCLKAANDPDIVIDERSPLLREFCLKS0S1S2VSSVDDL VDD AVDD AVS ..
CY24141ZC-3 ,MediaClock Graphics Clock GeneratorBlock DiagramCLK_A 18.432 MHzXINOUTPUTQOSCΦCLK_B (selectable)DIVIDERXOUTVCOPPLLFSAVSSAVDD VDDL VSSL ..
CY24141ZC-3 ,MediaClock Graphics Clock GeneratorCharacteristics Parameter Description Conditions Min. Typ. Max. UnitI Output High Current V = V – 0 ..
CY24141ZC-3 ,MediaClock Graphics Clock Generatorapplications Low-jitter, high-accuracy output Meets critical timing requirements in complex system ..
CY8C21123-24SXI ,PSoC™ Mixed-Signal Array Preliminary Data SheetFeatures Powerful Harvard Architecture Processor Flexible On-Chip Memory Precision, Programmable ..
CY8C21123-24SXIT Characteristics ..5 Packaging Dimensions . 31Getting Started ...5 Thermal Impedances ... 34Applica ..
CY8C21223-24LGXIT Electrical Specifications ...16Document Number: 38-12022 Rev. *X Page 2 of 46Row OutputConfigurati ..
CY8C21223-24SXI ,PSoC™ Mixed-Signal Array Preliminary Data SheetCharacteristics” on page 3.constraints of a fixed peripheral controller.Digital blocks are provided ..
CY8C21234-24SXI ,PSoC(TM) Mixed Signal Array Preliminary Data SheetFeatures Powerful Harvard Architecture Processor Flexible On-Chip Memory Programmable Pin Configu ..
CY8C21234-24SXIT , PSoC® Programmable System-on-Chip™
CY2412SC-1
