CS1311 ,Media CoprocessorFeatures VLD Coprocessor■ Physical ■ Parses MPEG-1 and MPEG-2 elementary bit streamsgenerating run- ..
CS18LV02565AC-70 , HIGH SPEED SUPER LOW POWER SRAM
CS18LV02565ACR70 , HIGH SPEED SUPER LOW POWER SRAM
CS18LV02565BI-55 , HIGH SPEED SUPER LOW POWER SRAM
CS18LV02565PCR70 , HIGH SPEED SUPER LOW POWER SRAM
CS18LV02565PCR70 , HIGH SPEED SUPER LOW POWER SRAM
CX-53F , Ultra-thin, thickness 1.1mm or less.
CX6002 , BROADBAND: RF & WIRELESS
CX6020 , BROADBAND: RF & WIRELESS
CX74038-12 , 2.6 GHz/800 MHz Dual Fractional-N/lnteger-N Frequency Synthesizer
CX74038-12 , 2.6 GHz/800 MHz Dual Fractional-N/lnteger-N Frequency Synthesizer
CX74063-26 , RF Transceiver for Multi-Band GSM, GPRS, and EDGE Applications with Power Ramping Controller and Integrated Crystal Oscillator with 26 MHz Output
CS1311
Media Coprocessor
Geode™
1301/CS
ultim
dia
panion:
Media
ata
cessor
General DescriptionThe National Semiconductor® Geode™ CS1301 and
CS1311 multimedia companions actas coprocessorsto
decode multimediain National’s Geode single chip proces-
sor-based systems (i.e., SC1200/SC1201, SC2200, and
SC3200, hereafter referredtoas SCx200). They providea
multimedia experience for an Information Appliance (IA)
user that cannot typicallybe achievedona PC. implementinga dedicated coprocessorto perform multi-
media tasks,a high quality video viewing experience can achieved. This high qualityis achieved by havinga
coprocessor architecture thatis ideally suitedfor decoding
digital media.In addition, since the decodingis not occur-
ringon the SCx200, system events cannot interrupt the
coprocessor’s taskof decoding media and thereby causing
stutteringof soundor interruptionsin the video.
Lower power consumption can alsobe achieved using the
SCx200/CS1301 or SCx200/CS1311 solution. The
CS1301/CS1311 hasan architecture specifically designed
for decoding media. The architectureis such that while
decoding media, poweris not consumedby portionsof the
system that are not usedto decode media. Since the
SCx200is not decoding the media locally,itis abletogo
intoa lower power state. When the CS1301/CS1311is not
decoding media,it uses almostno power.
Additionally, since the architectureis designedfor decoding
media, fewer CS1301/CS1311 cycles are required.
Internal Block Diagram2/4/6/8 Ch. Digital Audio
16/32-Bit DataI2 SDC,to22 MHz AO_SCK
IEC958upto40 Mbit/sec
Huffman Decoder
Slice-At-A-Time
MPEG-1&2
CCIR-656 Digital Video
32-Bit Data
(upto 664 MB/sec)
Down andUp Scaling
YUV--> RGB
(50 Mpix/sec)
PCI V2.1 (32 bits,33 MHz)
External Bus
ACCESS.bus Interface EEPROM
VideoIn
SDRAM
PCI Interface
Video Out
AudioIn Audio Out
S/PDIF Out
ACCESS.bus
Interface
VLD
Coprocessor
Timers
VLIW
CPU
32KI$
16KD$
Image
Coprocessor
Main Memory Interface
Stereo Digital Audio
8/16-bit dataI2 SDC,to22 MHz AI_SCK
CCIR-656 Digital Video
YUV 4:2:2upto81 MHz
(40 Mpix/sec)
PreliminaryAugust 2002
Revision 2.2
Geode™ CS1301/CS1311 Multimedia Companion:
Media Coprocessor
