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CLC016ACQ-CLC016AJQ-CLC016MTC
Data Retiming PLL with Automatic Rate Selection
CLC016
Data Retiming PLL with Automatic Rate Selection
General DescriptionNational’s Comlinear CLC016isa low-cost, monolithic, data
retiming phase-locked loop (PLL) designedfor high-speed
serial clock and data recovery. The CLC016 simplifies high-
speed data recoveryin multi-rate systemsby incorporating
auto-rate select (ARS) circuitryon chip. This function allows
the userto configure the CLC016to recognizeupto four
different data rates and automatically adjustto provide ac-
curate, low-jitter clock and data recovery.A single resistoris
usedtoset each data rate anywhere between40 Mbps and
400 Mbps.No potentiometers, crystals,or other external ICs
are requiredtoset the rate.
The CLC016 has output jitterof only 130 psppata 270 Mbps
data rate and 0.25% fractional loop bandwidth. Low phase
detector output offset and low VCO injection combineto
ensure thatthe CLC016 doesnot generatebit errorsor large
phase transientsin responseto extreme fluctuationsin data
transition density. The resultis improved performance when
handling the pathological patterns inherentin the SMPTE
259M video industry standard.
The carrier detect and output mute functions maybe used
togetherto automatically latch the outputs whenno datais
present, preventing random transitions. The external loop
filter allowsthe userto tailorthe loop responsetothe specific
application needs. The CLC016 will operate with either +5V −5.2V power supplies. The serial data inputs and outputs, wellas the recovered clock outputs, allow single-or
differential-ECL interfacing. The logic control inputsare TTL-
compatible.
Applications SMPTE 259M serial digital interfaces: NTSC/PAL, 4:2:2
component, 360 Mbps wide screen Serial digital video routing and distribution Clock and data recoveryfor high-speed data
transmission Re-synchronizationof serial datafor SONET/SDH, ATM,
CAD networks, medical and industrial imaging
Features Retimed data output Recovered clock output Auto and manual rate select modes Four user-configurable data rates No potentiometers required External loop bandwidth control Frequency detectorfor lock acquisition Carrier detect output Output MUTE function Single supply operation: +5Vor −5.2V Low cost
Key Specifications Low jitter: 130 pspp@ 270 Mbps, 0.25% fractional loop
bandwidth (0.675 MHz) High data rates:40 Mbps− 400 Mbps Low supply current: 100 mA, including output biasing Flexible fractional loop bandwidth: from 0.05%to 0.5%
Ordering Information
Order Number Temperature Package
CLC016ACQ 0˚Cto +70˚C PLCC V28A
CLC016AJQ –40˚Cto +85˚C PLCC V28A
CLC016MTC –40˚Cto +85˚C TSSOP MTC28
July 2002
CLC016
Data
Retiming
PLL
with
Automatic
Rate
Selection