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CHL8318-20
8 phase VR11.1 low temperature multiphase PWM controller for high efficiency solutions
International
TOR Rectifier
Digital Multi-Phase Buck Controller
GH L83'18-20
FEATURES
0 Intel VR11.x compliant Digital PWM Controller
q Programmable l-phase to 8-phase operation
q Customized Digital Over-Clocking features an
easy-to-use SMBus Gamer command and a
Gamer VID control up to 2.3V, Gamer Vmax,
VID Override or Track, Digital Load-Line Adjust,
Gamer OC/OVP, Gamer OFF pin and Gamer OTP
q IR Efficiency Shaping features a Variable Gate Drive
and Dynamic Phase Control
q 1-phase to 4-phase PSI for Light Loads
. Adaptive Transient Algorithm minimizes capacitors
q Designed for use with coupled inductors
o Enables Thermal Phase Balancing
o SMBus Fault Indicators: OVP, UVP, OCP, OTP
. SMBus interface for configuring and monitoring;
SMBus commands include monitoring input
current and power
0 Compatible with IR ATL Drivers and tri-state Drivers
. 9 bytes of NVM storage available for customer use
. +3.3V supply voltage; 09C to 859C Ambient
operation
. RoHS Compliant, MSL level 1 package
APPLICATIONS
q lntelo VR11.x CPU VRD and VRM; DDR Memory
. High Performance Desktops and Servers
q Over-clocking and High-Efficiency Application
DESCRIPTION
The CHL8318-20 is an 8-phase digital synchronous buck
controller for core regulation of high-performance Intelo
VR11.1 and VR11.0 platforms. The CHL8318-20 is fully
compliant with VR11.1including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
The IR CHL8318-20 includes a customized set of digital
over-clocking features which require no external
components. Gaming applications can use the SMBus
interface to place the VRD into "Gamer Mode" to extend
VID up to 2.3V with 6.25 mV resolution.
The CHL8318-20 deploys a number of efficiency shaping
features such as variable MOSFET gate drive versus load,
programmable PSI modes for optimum light-load along
with programmable phase shedding to autonomously
add/drop phases versus load.
CHL8318-20 supports three NTC temperature sensors to
report temperature and trigger VR HOT and OTP faults.
Digital thermal balancing allows proportional current
imbalance between phases.
The CHL8318-20 provides extensive OVP, UVP, OCP and
OTP fault protection. Device and fault configuration
parameters are easily defined using the IR Power Designer
GUI and stored in on-chip non-volatile memory (NVM).
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven CHL8318-20 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
BASIC APPLICATION
CHL8318-20 _
VR_RDY_L1 (cy-- VR_ROY PWMl -- PtowIR
Stage 1
VR_HOT Cy-- VR_HOT ISEN1 é
ENABLE cy-- EN IRTN1
" VOUT
SCL cr-- SCL PWM2 " Ptowllt o
SDA ‘_. SDA Stage2 _L'
C) ISEN2 ;
SALERT# (DA- SALERT# IRTNZ
PSI# Cr-- PSI# I
o-- VID PWM3 _, Stage 3
VID to VIDO . : ISEN3 ;
o-e Vibe IRTN3
3.3V OT VCC PWMB -- PowlR
Stage 8
I ISEN8 —' l
IRTN8 -
Figure L CHL8318-20 Basic Application Circuit
PIN DIAGRAM
._._ mm t'9t'9mt9rt9rrtrottttsts
a a a a a a a a a a a a a a
F-tur-tLF-tur-Ulf-tur-tur-tu
1Crr_rt_rrr_7t_Et'-'t_Err_7t_ru_t_Eu_tt_Err_7
ll ____
RCSP | 1 o 42I IRTNS
RCSM | 2 41 I ISEN8
VCC | 3 40 | VCC
VCPU | 4 PWM8
VRTN I 5 PWM7
GAMEFLOFF I 6 PWM6
IMON I 7 FWMS
RRES a
I TOPVIEW PWM4
VINSEN | 9 PWM3
TSEN1 | 10 PWM2
TSEN2 | 11 PWM1
TSEN3 | 12 31 , NC
EN | 13 aol VCC
VISA | 14 29I VAFLGATE
'27jtC_2C_1C_1C_1t22C_1C_1C_2
Figure 2: CHL8318-20 Package Top View
il September28, 2011 I FINAL I v1.02
International
TOR Rectifier Digital Multi-Phase Buck Controller [tik [33.18-20
ORDERING INFORMATION
CHL8318-20- (2.imaliihg
QFN 3000 CHL8318-20-00CRT1
T-Tape and Reel QFN 3000 CHL8318-20-xxCRT2
R - Package Type (DFN) Notes:
C - Operating Temperature
(Commercial Standard)
XX-Configuration File ID
SADDR/
GAMER_OFF
VINSEN
I. For unprogrammed/default parts, use configuration file
\\1516171819 20 2122 23 24 25 26 27 28
<:-l4#rstoU9stC'0CNl
Q7oQtL:ut:2htL:uQt:2htL:uQ
cowu.>>>>>>
Figure 3: CHL8318-20 Top View Enlarged
00. Unprogrammed parts will not start up until
programmed in order to ensure a safe power up.
2. "xx" indicates customer specific configuration file.
- F N N cn co V V LO LO e) e, Ps Ps
a a a Z a a a Z a Z a a Z a
_ LLI _ LU _ Ud _ LU _ LU r- LLI _ LU
tlu-Orland-tru-Orr-ru-or-tCv-Orson/ru-o
Aarir4T3r2TirIa"4-7TrsT4"4-3tN,
Ay 55 54 53 52 51 50 49 48 47 46 45 44 43
I 1 O 42 IRTN8
I 2 41 ISEN8
I 3 40 VCC
I 4 39 PWM8
5 38 w
E e CHL8318-20 37 P M7
56 Pin PWM6
I 7 8mmx8mm 36 PWM5
8 QFN 35
I 9 TOP VIEW PWM4
I 34 PWM3
I 10 GND 33 PWM2
I 11 32 PWM1
I 12 31 NC
I 13 30 VCC
I 29 1/AR_GATE
g September28, 2011 I FINAL I v1.02
