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CHL8316
6 phase VR11.1 multiphase PWM controller for high efficiency solutions
International
TOR Rectifier
Digital Multi-Phase Buck Controller
GHL83'16
FEATURES
0 Intel VR11.x compliant Digital PWM Controller
q Programmable l-phase to 6-phase operation
q Customized Digital Over-Clocking features an
easy-to-use SMBus Gamer command and a Gamer
VID control up to 2.3V, Gamer Vmax, VID Override
or Track, Digital Load-Line Adjust, Gamer OC/OVP,
Gamer OFF pin and Gamer OTP
q IR Efficiency Shaping features a Variable Gate Drive
and Dynamic Phase Control
q 1-phase to 2-phase PSI for Light Loads
. Adaptive Transient Algorithm minimizes capacitors
o Enables Thermal Phase Balancing
o SMBus Fault Indicators: OVP, UVP, OCP, OTP
o SMBus interface for configuring and monitoring;
SMBus commands include monitoring input
current and power
q Compatible with IR ATL Drivers and tri-state Drivers
. 9 bytes of NVM storage available for customer use
. +3.3V supply voltage; 09C to 859C Ambient
operation
. RoHS Compliant, MSL level 1 package
APPLICATIONS
q lntelo VR11.x CPU VRD and VRM; DDR Memory
q High Performance Desktops, Servers and
Graphics Cards
q Over-clocking and High-Efficiency Application
DESCRIPTION
The CHL8316 is a 6-phase digital synchronous buck
controller for core regulation of high-performance lntelo
VR11.1 and VR11.0 platforms. The CHL8316 is fully
compliant with VR11.1including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
The CHL8316 includes a customized set of digital over-
clocking features which require no external components.
Gaming applications can use the SMBus interface to place
the VRD into "Gamer Mode" to extend VID up to 2.3V with
6.25 mV resolution.
The CHL8316 deploys a number of efficiency shaping
features such as variable MOSFET gate drive versus load,
programmable PSI modes for optimum light-load along
with programmable phase shedding to autonomously
add/drop phases versus load.
CHL8316 supports NTC temperature sense to report
temperature and trigger VR HOT and OTP faults. Digital
thermal balancing allows proportional current imbalance
between phases.
The CHL8316 provides extensive OVP, UVP, OCP, and
OTP fault protection. Device and fault configuration
parameters are easily defined using the IR Power Designer
GUI and stored in on-chip non-volatile memory (NVM).
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven CHL8316 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
CHL8316 Powm
VR_RDY_L1 Cy-- VR_RDY PWMl T
VR_HOT (c-- VR_HOT ISEN1
ENABLE Cy-- EN IRTN1
SCL Cy-- SCL PWM2
SDA 04—» SDA ISENZ age
SALERT# o_- SALERT# IRTN2 T
PSI# cr-- PSI# PowIR
H VID7 PWM3
VID7 to VIDO E JSEN3
Cr-- VlDO IRTN3
. PowlR
T3 OT VCC pwms - Stagesl:
ISENG I l
IRTNG -
Figure L CHL8316 Basic Application Circuit
PIN DIAGRAM
4847 46 45444342 414039 38 37
CHL8316 32 I PWM3
48 Pin
7mmx7mm 31 I PWM2
QFN so I PWM1
TOP VIEW 29 I NC
memUIAUN-t
25 I VR_READV
Figure 2: CHL8316 Package Top View
il October 12, 2011 I FINAL I v1.02
International
TOR Rectifier Digital Multi-Phase Buck Controller GHL83.15
ORDERING INFORMATION
CHL8316-
T-Tape and Reel QFN 3000 CHL8316CRT
QFN 3000 CHL8316-XXCRT1
R- Package Type (DFN)
Notes:
C - Operating Temperature
(Commercial Standard)
XX-Configuration File ID
SADDR/
GAMER_OFF
VINSEN
coooxtcno'lbwmA
l—H—H—H—lf—ll—llfilfilfilfiml—l
48 47 46 45 44 43 42 41 4O 39 38 37
CHL8316
48 Pin
7mmx 7mm
TOP VIEW
13141516171819 20 2122 23 24
[-ll-ll-ll-ll-lt-ll-ll-ll-ll-ll-ll-l
< El) Lt: Ps a, Ln <1- 00 cu
tDtntiSSSSS5:S5
SALERT#
Figure 3: CHL8316 Top View Enlarged
VAR_GATE
VR_H OT
VR_R EADY
I. "xx" indicates customer specific configuration file.
til October 12, 2011 I FINAL
I v1.02
