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CHL8314-CHL8314CRT
4 phase VR11.1 multiphase PWM controller for high efficiency solutions
International
TOR Rectifier Digital Multi-phase Buck Controller GHL83'14
FEATURES
0 Intel VR11.x compliant Digital PWM Controller
q Programmable l-phase to 4-phase operation
q Customized Digital Over-Clocking features an
easy-to-use SMBus Gamer command and a Gamer
VID control up to 2.3V, Gamer Vmax, VID Override
or Track, Digital Load-Line Adjust, Gamer OC/OVP,
Gamer OFF pin and Gamer OTP
q IR Efficiency Shaping features a Variable Gate Drive
and Dynamic Phase Control
q 1-phase to 2-phase PSI for Light Loads
. Adaptive Transient Algorithm minimizes capacitors
o Enables Thermal Phase Balancing
o SMBus Fault Indicators: OVP, UVP, OCP, OTP
o SMBus interface for configuring and monitoring;
SMBus commands include monitoring input
current and power
q Compatible with IR ATL Drivers and tri-state drivers
. 9 bytes of NVM storage available for customer use
. +3.3V supply voltage; 09C to 859C Ambient
operation
. RoHS Compliant, MSL level 1 package
APPLICATIONS
q lntelo VR11.x CPU VRD and VRM; DDR Memory
q High Performance Desktops, Servers and
Graphics Cards
q Over-clocking and High-Efficiency Application
DESCRIPTION
The CHL8314 is a 4-phase digital synchronous buck
controller for core regulation of high-performance lntelo
VR11.1 and VR11.0 platforms. The CHL8314 is fully
compliant with VR11.1including Power Status Indicator
(PSI) and for improved light load efficiency and accurate
current output (IMON).
The CHL8314 includes a customized set of digital over-
clocking features which require no external components.
Gaming applications can use the SMBus interface to place
the VRD into "Gamer Mode" to extend VID up to 2.3V with
6.25 mV resolution.
The CHL8314 deploys a number of efficiency shaping
features such as variable MOSFET gate drive versus load,
programmable PSI modes for optimum light-load along
with programmable phase shedding to autonomously
add/drop phases versus load.
CHL8314 supports NTC temperature sense to report
temperature and trigger VR HOT and OTP faults. Digital
thermal balancing allows proportional current imbalance
between phases.
The CHL8314 provides extensive OVP, UVP, OCP, and
OTP fault protection. Device and fault configuration
parameters are easily defined using the IR Power Designer
GUI and stored in on-chip non-volatile memory (NVM).
The 3-pin SMBus interface can be used to monitor a variety
of operating parameters on up to seven CHL8314 based
VRs. The controller includes a unique sensorless and
lossless input current monitoring capability.
CHL8314 PowIR
VR_RDV_L1 o-- VR_RDY PWMl T
VR_HOT Cy-- VR_HOT ISENl
ENABLE Cr-- EN IRTN1
I VOUT
SCL cr-- SCL PWM2
SDA Cy---------- SDA ISENZ age
SALERT# cr_- SALERT# IRTN2 T
PSI# o-e PSl# PowlR
Cr-.- VID PWM3
VID to VIDO E ISEN3
cr-- VIDO IRTN3
3.3V OT vcc PWM4 - Stage 4
ISEN4 _' l
IRTN4 -____
Figure L CHL8314 Basic Application Circuit
PIN DIAGRAM
48 47 46 4544 43 42 4140 39 38 37
RCSP | 1 as| vcc
RCSM | 2 asl NC
vcc I 3 MI NC
VCPU | 4 asl PWM4
VRTN | 5 "H" 32| PWMS
SADDR/ 48 Pin
GAMER_OFF 31 I PWM
IMON 30 | PWM1
RRES | s 29| NC
VINSEN | 9 ZBI vcc
TSEN I 10 27 I VAR_GATE
EN | 11 26 | VFLHOT
V18A | 12 25 | VR_READV
Figure 2: CHL8314 Package Top View
il October 12, 2011 I FINAL I V1.06
International
TOR Rectifier
Digital Multi-Phase Buck Controller CtRll8NlLa,l
ORDERING INFORMATION
CHL8314 - Tape & Reel Qty mam
QFN 3000 CHL8314CRT
T - Tape and Reel QFN 3000 CHL8314-XXCRT1
R- Package Type (DFN) Notes:
I. "xx" indicates customer specific configuration file.
C - Operating Temperature
(Commercial Standard)
XX - Configuration File ID
SADDR/
GAMER_OFF
VINSEN
(Dwflmo'l-bOJN—t
45 44 43 42 41 40 39 38 37
CHL8314
48 Pin
7mmx 7mm
TOP VIEW
13141516171819 20 2122 23 24
[_ll_ll_lr_ll_ll_ll_ll_lr_lr_lt_ll_l
4t: < _1 E ts. (D l!) st CD N
tntDiiC:SSSS:SSSS
Figure 3: CHL8314 Top View Enlarged
VAR_GATE
VR_H OT
VR_R EADY
|_ll_l|_ll_l|_ll_ll_ll_l\_ll_ll_lLl
til October 12, 2011 I FINAL I V1.06
