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CGS74CT2524M-CGS74CT2524MX
1 to 4 Minimum Skew (300 ps) Clock Driver
TL/F/11752
CGS74CT2524
Minimum
Skew
(300
ps)
Clock
Driver
September 1995
CGS74CT2524 to4 Minimum Skew (300 ps) Clock Driver
General Description
These minimum skew clock driversare designedfor Clock
Generation and Support (CGS) applications operatingat
high frequencies. This device guarantees minimum output
skew acrossthe outputsofa given device.
Skew parametersarealso providedasa meansto measure
duty cycle requirementsas those foundin high speed clock-
ing systems. The CGS74CT2524isa minimum skew clock
driver with one input driving four outputs, specificallyde-
signedfor signal generation and clock distribution applica-
tions.
Features Guaranteed300ps pin-to-pin skew (tOSHLand tOSLH) Implementedon National’s FACTTM family process1 inputto4 outputslow skew clock distribution Symmetric output current drive:24mA IOH/IOL Industrial temperatureof b40§Cto a85§C 8-pin SOIC package Low dynamic power consumption above20 MHz Guaranteed2kV ESD protection
Logic Symbol
TL/F/11752–1
The outputpinsactasa single entityandwill followthestateoftheCLK
whenthe clockdistributionchip isselected.
Pin Description
Pin Names Descripton
CLK Clock Input
O0–O3 Outputs
Truth Table
Inputs Outputs
CLK O0–O3e LowLogicLevele HighLogicLevel
Connection Diagrams
PinAssignment
SOIC(M)
TL/F/11752–2
TL/F/11752–3
FACTTMisa trademarkof NationalSemiconductor Corporation.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
