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CGS410V
Programmable Video Pixel Clock Generator [Life-time buy]
TL/F/11919
CGS410
Programmable
Clock
Generator
September 1995
CGS410
Programmable Clock Generator
General Description
The CGS410isa programmable clock generator whichpro-
ducesa variable frequency clock outputforusein graphics,
disk drives and clock synchronizing applications. The
CGS410 produces output clocksin CMOS and differential
formats.The useris ableto programthe differential output
levelsto best suitthe levelsofthe interfacing device.A
common configuration allowsPCLKto emulate positive ECL
logic levels, eliminatingthe needfor TTLto ECL translation.
The CGS410is referencedoffthe XTLIN input whichcanbe
configuredfor either external crystalor external oscillator
support.All internal frequency generationis referencedfrom
the XTLIN input. The CGS410 can alsobe drivenby
EXTCLKas desired. EXTCLK may serveasthe source from fixed clock(for passthru mode),orasan external VCO
input.
The CGS410 contains three internal user-selectablelow
pass filters (LPFs).A fourth option allowsfortheuseofan
external LPF configuration.Useofthe internal filters greatly
simplifies layout, reduces boardreal estate,and minimizes
part count.A programmable polarity charge pump allows
the userto optimizethe optional external LPF circuitry.
The primary loop structureofthe CGS410 consistsof pro-
grammableNandR dividers. Bothare contiguous; Ncanbe
any value between2and 16383, andR canbeany value
between1 and 1023. Additional dividersofthe internal
VCO allow individual programmability for the PCLK,
CMOSÐPCLK,and LCLK outputs. additional advantageofthe CGS410isits abilityto per-
form smooth, glitch-free clock output changesasthe user
selects passthru clock sourcesor changes the VCO
frequency.A real-time synchronous load clock enable
(LCLKÐEN) control input allowsforthe enabling anddis-
ablingofthe LCLK output. Thisis suitablefor applications
which requirethe removalofan active LCLK duringthe
blanking portionofa screen refresh. power-upthe XTLIN frequencyis internally dividedby
two and routedtothe PCLK outputs, providinga known
power-up output frequency witha 50% duty cycle. The
CGS410is programmedbya serial streamof data.A serial
bit readcan verifythe contentsofthe register.
Features Fully programmable frequency generator Provides frequenciesto135 MHz Configurable high-speed complementary clock outputs CMOS output clocks Glitch-free transitionsfor clock changes Powersupina known state Single supply (a5V) operation Low current draw, idealfor battery applications Read/write control register Internal VCOand loop filters
Connection Diagram
TL/F/11919–1
Important Note:This deviceis sensitiveto noiseon certainpins, especially FREQCTL,FILTER,AVDD,and AGND. Specialcare mustbetaken withboard
layoutfor optimum performance.
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
C1995National SemiconductorCorporation RRD-B30M115/PrintedinU.S.A.
