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CDCVF2310PW-CDCVF2310PWG4-CDCVF2310PWR
High Performance 1:10 Clock Buffer for General Purpose Applications
LogicDD 1Y(4...0)
CLK
CDCVF2310Ω25Ω 2Y(4...0)
Logic2G
GNDDDVDDVDDVDDVDD
GND GND banksof five outputs each provide low-skew copies• Pin-to-Pin Skew< 100psat VDD 3.3V of CLK. After power up, the default state of the
outputsis low regardlessof the stateof the control• VDD Range: 2.3Vto 3.6V pins. For normal operation, the outputs of bank• Operating Temperature Range –40°Cto 105°C 1Y[0:4]or 2Y[0:4] can be placedina low state when• Supports 105ºC Ambient Temperature (see the control pins (1Gor 2G, respectively) are held lowThermal Considerations) anda negative clock edgeis detected on the CLK
input. The outputsof bank 1Y[0:4]or 2Y[0:4] can be• Output Enable Glitch Suppression
switched into the buffer mode when the control pins• Distributes One Clock Inputto Two Banksof Five (1G and 2G) are held high anda negative clock edgeOutputs is detectedon the CLK input. The device operatesin• 25-Ω On-Chip Series Damping Resistors a 2.5-V and 3.3-V environment. The built-in output
enable glitch suppression ensuresa synchronized• Packagedin 24-Pin TSSOP
output enable sequenceto distribute full period clock
signals.
2 ApplicationsThe CDCVF2310is characterized for operation from• General-Purpose Applications –40°Cto 85°C.
Device Information(1)(1) Forall available packages, see the orderable
the endofthe data sheet.
Functional Block Diagram
