CDCVF111FN ,1:9 Differential LVPECL Clock Drivermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CDCVF111FN ,1:9 Differential LVPECL Clock Drivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
CDCVF2310PW ,High Performance 1:10 Clock Buffer for General Purpose ApplicationsFeatures 3 DescriptionThe CDCVF2310 device is a high-performance, low-1• High-Performance 1:10 Cloc ..
CDCVF2310PWG4 ,High Performance 1:10 Clock Buffer for General Purpose Applications 24-TSSOP -40 to 856.2 ESD RatingsVALUE UNIT(1)Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 2000ElectrostaticV V ..
CDCVF2310PWR ,High Performance 1:10 Clock Buffer for General Purpose ApplicationsElectrical Characteristics....... 412 Device and Documentation Support........ 166.6 Timing Require ..
CDCVF2505D ,PLL Clock Driver for Synch. DRAM & Gen. Purp. Apps W/Spread Spectrum Compatibility, Power Down ModeFeatures 3 DescriptionThe CDCVF2505 is a high-performance, low-skew,1• Phase-Lock Loop Clock Driver ..
CL9000 , AM/FM RADIO TRANSISTOR KIT
CLA50E1200HB , High Efficiency Thyristor
CLC001AJE ,Serial Digital Cable Driver with Adjustable OutputsElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
CLC002MA ,SMPTE 292M / 259M Serial Digital Cable DriverElectrical CharacteristicsOver Supply Voltage and Operating Temperature ranges, unless otherwise sp ..
CLC005AJE ,ITU-T G.703 Cable Driver with Adjustable OutputsGeneral Description Key Specificationsn 650 ps rise and fall timesNational’s Comlinear CLC005 is a ..
CLC005AJE-TR13 ,ITU-T G.703 Cable Driver with Adjustable OutputsApplicationsand requires no external bias resistors. The differential in-n ITU-T G.703, Sonet/SDH, ..
CDCVF111FN
1:9 Differential LVPECL Clock Driver
Differential Clock Outputs Output Reference Voltage (VREF) Allows
Distribution From a Single-Ended Clock
Input Packaged In a 28-Pin Plastic Chip Carrier
descriptionThe differential LVPECL clock-driver circuit
distributes one pair of differential LVPECL clock
inputs (CLKIN, CLKIN) to nine pairs of differential
clock (Y , Y) outputs with minimum skew for clock
distribution. It is specifically designed for driving
50-Ω transmission lines.
The VREF output can be strapped to the CLKIN input for a single-ended CLKIN input.
The CDCVF111 is characterized for operation from –40°C to 85°C.
FUNCTION TABLEPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
VCC
VCC
NC – No internal connectionY5Y4Y3Y3
