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CDCM61004RHBR-CDCM61004RHBT
1:4 Ultra Low Jitter Crystal-In Clock Generator
PFD
Charge Pump
Loop Filter
Feedback
Divider
Prescaler
Output Divider OS[1...0]
OD[2...0]PR[1...0] 3
RSTN
Crystal/
LVCMOS
VCO
3.3 V
CDCM61004LVPECL/
LVCMOS/
LVDS
Output
Driver
LVPECL/
LVCMOS/
LVDS
Output
Driver
LVPECL/
LVCMOS/
LVDS
Output
Driver
LVPECL/
LVCMOS/
LVDS
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CDCM61004SCAS871H –FEBRUARY 2009–REVISED JANUARY 2016
CDCM61004 Four Output, Integrated VCO, Low-Jitter Clock Generator Features 2 Applications One Crystal/LVCMOS Reference Input Including • Low-Jitter Clock Driver for High-End Datacom
24.8832 MHz,25 MHz, and 26.5625 MHz Applications Including SONET, Ethernet, Fibre
Channel, Serial ATA, and HDTV• Input Frequency Range: 21.875 MHzto
28.47 MHz • Cost-Effective High-Frequency Crystal Oscillator
Replacement• On-Chip VCO Operatesin Frequency Rangeof
1.75 GHzto 2.05 GHz
3 Description• 4x Output Available: The CDCM61004 isa highly versatile, low-jitter– Pin-Selectable Between LVPECL, LVDS,or frequency synthesizer capableof generating four low-2-LVCMOS; Operatesat 3.3V jitter clock outputs, selectable between low-voltage LVCMOS Bypass Output Available positive emitter coupled logic (LVPECL), low-voltage
differential signaling (LVDS), or low-voltage• Output Frequency Selectableby/1,/2,/3,/4,/6, complementary metal oxide semiconductor/8 froma Single Output Divider (LVCMOS) outputs, froma low-frequency crystalof• Supports Common LVPECL/LVDS Output LVCMOS input fora variety of wireline and dataFrequencies: communication applications. The CDCM61004
features an onboard PLL that can be easily– 62.5 MHz, 74.25 MHz,75 MHz, 77.76 MHz,
configured solely through control pins. The overall100 MHz, 106.25 MHz, 125 MHz, 150 MHz, output random jitter performanceis less than1 ps,155.52 MHz, 156.25 MHz, 159.375 MHz, RMS (from 10 kHzto20 MHz), making this devicea187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz, perfect choice for usein demanding applications such311.04 MHz, 312.5 MHz, 622.08 MHz, as SONET, Ethernet, Fibre Channel, and SAN. The625 MHz CDCM61004 is available ina small, 32-pin,• Supports Common LVCMOS Output Frequencies: 5-mm× 5-mm VQFN package. 62.5 MHz, 74.25 MHz,75 MHz, 77.76 MHz,
Device Information(1)100 MHz, 106.25 MHz, 125 MHz, 150 MHz,155.52 MHz, 156.25 MHz, 159.375 MHz,187.5 MHz, 200 MHz, 212.5 MHz, 250 MHz Output Frequency Range: 43.75 MHzto (1) Forall available packages, see the orderable addendumat
the endofthe data sheet.683.264 MHz (See Table4) Internal PLL Loop Bandwidth: 400 kHz
CDCM61004 Block Diagram• High-Performance PLL Core: Phase Noise typicallyat –146 dBc/Hzat
5-MHz Offsetfor 625-MHz LVPECL Output Random Jitter typicallyat 0.509 ps, RMS10 kHzto20 MHz)for 625-MHz LVPECL
Outputto 50%(± 5%)30pson LVPECL Outputs Pins: Divider