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CDCLVP2108RGZT
Low Jitter, Dual 1:8 Universal-to-LVPECL Buffer 48-VQFN
LVPECL 8
Reference
OUTP[15...8]
LVPECL 8
OUTP[7...0]
OUTN[7...0]
VCC
VCC VCC VCC VCC VCC
INP0
INN0
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CDCLVP2108SCAS878C –MAY 2009–REVISED JANUARY 2016
CDCLVP2108 16-LVPECL Output, High-Performance Clock Buffer Features 3 DescriptionThe CDCLVP2108isa highly versatile, low additive Dual 1:8 Differential Buffer jitter buffer that can generate 16 copiesof LVPECL• Two Clock Inputs clock outputs from two LVPECL, LVDS,or LVCMOS• Universal Inputs Can Accept LVPECL, LVDS, inputs fora varietyof communication applications.It
LVCMOS/LVTTL hasa maximum clock frequency upto2 GHz. Each
buffer block consists of one input that feeds two• 16 LVPECL Outputs LVPECL outputs. The overall additive jitter• Maximum Clock Frequency:2 GHz performanceis less than 0.1 ps, RMS from10 kHzto• Maximum Core Current Consumption: 115 mA 20 MHz, and overall output skewisas lowas 25 ps,
making the devicea• Very Low Additive Jitter: <100fs, RMSin 10-kHz
demanding applications.to 20-MHz Offset Range 2.375-Vto 3.6-V Device Power Supply The CDCLVP2108 clock
inputs (IN0, IN1)to 16• Maximum Propagation Delay: 550ps clock outputs (OUT0, OUT15)• Maximum Within Bank Output Skew:25ps clock distribution. Each• LVPECL Reference Voltage, VAC_REF, Available input that feeds two LVPECL
for Capacitive-Coupled Inputs inputs canbe LVPECL, LVDS, Industrial Temperature Range: –40°Cto +85°C The CDCLVP2108is specifically Supports 105°C PCB Temperature (Measured 50-Ω transmission lines.
single-ended mode, thewitha Thermal Pad)
(VAC_REF) must be applied• Availablein 7-mm× 7-mm, 48-Pin VQFN (RGZ) input pin. However, for high-speed performance uptoPackage 2 GHz, differential modeis strongly recommended.• ESD Protection Exceeds 2000V (HBM) The CDCLVP2108is characterized for operation from
–40°Cto +85°C andis availableina 7-mm× 7-mm,
2 Applications VQFN-48 package.• Wireless Communications
Device Information(1)• Telecommunications/Networking• Medical Imaging• Test and Measurement Equipment
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Simplified Schematic
