CDCLVP1102RGTR ,Low Jitter 1:2 Universal-to-LVPECL Buffer 16-QFN -40 to 85Features 3 DescriptionThe CDCLVP1102 is a highly versatile, low additive1• 1:2 Differential Bufferj ..
CDCLVP110VF ,1:10 LVPECL/HSTL to LVPECL Clock DriverELECTRICAL CHARACTERISTICSVsupply: V = 0 V, V = -2.375 V to -3.8 VCC EEPARAMETER TEST CONDITIONS MI ..
CDCLVP110VFG4 ,1:10 LVPECL/HSTL to LVPECL Clock Driver 32-LQFP -40 to 85These devices have limited built-in ESD protection. The leads should be shorted together or the dev ..
CDCLVP110VFR ,1:10 LVPECL/HSTL to LVPECL Clock Drivermaximum ratings” may cause permanent damage to the device. These are stress ratingsonly, and functi ..
CDCLVP111 ,1:10 LVPECL Buffer with Selectable InputFeatures 3 DescriptionThe CDCLVP111 clock driver distributes one1• Distributes One Differential Clo ..
CDCLVP1212RHAT ,Low Jitter, 2-Input Selectable 1:12 Universal-to-LVPECL Buffer 40-VQFN Electrical Characteristics: LVPECL Output, at VCC = 3 V to 3.6 V ...... 10CC PCB• Added Thermal Con ..
CL431 , Precision Adjustable Shunt Reference
CL431 , Precision Adjustable Shunt Reference
CL431 , Precision Adjustable Shunt Reference
CL9000 , AM/FM RADIO TRANSISTOR KIT
CLA50E1200HB , High Efficiency Thyristor
CLC001AJE ,Serial Digital Cable Driver with Adjustable OutputsElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
CDCLVP1102RGTR
Low Jitter 1:2 Universal-to-LVPECL Buffer 16-QFN -40 to 85
Reference
Generator
LVPECL 2
OUTP[1,0]
OUTN[1,0]
VCC
INP
INN
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
CDCLVP1102SCAS884D –AUGUST 2009–REVISED DECEMBER 2015
CDCLVP1102 Two-LVPECL Output,
High-Performance Clock Buffer Features 3 DescriptionThe CDCLVP1102isa highly versatile, low additive 1:2 Differential Buffer jitter buffer that can generate two copiesof LVPECL• Single Clock Input clock outputs from one LVPECL, LVDS,or LVCMOS• Universal Inputs Can Accept LVPECL, LVDS, input fora varietyof communication applications.It
LVCMOS/LVTTL hasa maximum clock frequency upto2 GHz. The
overall additive jitter performanceis less than 0.1 ps,• Two LVPECL Outputs RMS from 10 kHz to 20 MHz, and overall output• Maximum Clock Frequency:2 GHz skewisas lowas 10 ps, making the devicea perfect• Maximum Core Current Consumption:33 mA choice for usein demanding applications. Very Low Additive Jitter: <100fs, RMSin 10-kHz The CDCLVP1102 clock buffer distributesa singleto 20-MHz Offset Range clock input (IN)to two pairsof differential LVPECL 2.375-Vto 3.6-V Device Power Supply clock outputs (OUT0, OUT1) with minimum skew for
clock distribution. The inputs can be LVPECL, LVDS,• Maximum Propagation Delay: 450ps or LVCMOS/LVTTL.• Maximum Output Skew:10ps
The CDCLVP1102is specifically designed for driving• LVPECL Reference Voltage, VAC_REF, Available 50-Ω transmission lines. When driving the inputsinfor Capacitive-Coupled Inputs single-ended mode, the LVPECL bias voltage• Industrial Temperature Range: –40°Cto 85°C (VAC_REF) should be appliedto the unused negative Supports 105°C PCB Temperature (Measuredat input pin. However, for high-speed performance upto GHz, differential modeis strongly recommended.Thermal Pad) Availablein 3-mm× 3-mm QFN-16 (RGT) The CDCLVP1102is characterized for operation from
Package –40°Cto 85°C andis availableina QFN-16, 3-mm×
3-mm package.• ESD Protection Exceeds2 kV (HBM)
Device Information(1)2 Applications• Wireless Communications• Telecommunications/Networking
(1) Forall available packages, see the orderable addendumat• Medical Imaging the endofthe data sheet. Test and Measurement Equipment
Simplified Schematic
