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CDCLVP110-CDCLVP110VF-CDCLVP110VFG4-CDCLVP110VFR Fast Delivery,Good Price
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Partno Mfg Dc Qty AvailableDescript
CDCLVP110TIN/a22avai1:10 LVPECL/HSTL to LVPECL Clock Driver
CDCLVP110VFTIN/a40avai1:10 LVPECL/HSTL to LVPECL Clock Driver
CDCLVP110VFG4TIN/a200avai1:10 LVPECL/HSTL to LVPECL Clock Driver 32-LQFP -40 to 85
CDCLVP110VFRTIN/a6avai1:10 LVPECL/HSTL to LVPECL Clock Driver


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CDCLVP110VFR ,1:10 LVPECL/HSTL to LVPECL Clock Drivermaximum ratings” may cause permanent damage to the device. These are stress ratingsonly, and functi ..
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CDCLVP110-CDCLVP110VF-CDCLVP110VFG4-CDCLVP110VFR
1:10 LVPECL/HSTL to LVPECL Clock Driver
LQFP PACKAGE
(TOP VIEW)
22212019
VCC
VCC
VCC 18Q3Q4Q4Q5Q5Q6Q6
CDCLVP110Outputs
differential clock pair of either LVPECL or HSTL
(selectable) input, (CLK0, CLK1) to ten pairs of• Fully Compatible With LVECL/LVPECL/HSTL
differential LVPECL clock (Q0, Q9) outputs with• Single Supply Voltage Required, ±3.3-Vor minimum skew for clock distribution. The±2.5-V Supply CDCLVP110 can accept two clock sources into an• Selectable Clock Input Through CLK_SEL input multiplexer. The CLK0 input accepts either
LVECL/LVPECL input signals, while CLK1 acceptsan• Low-Output Skew (Typ15 ps) for HSTL input signal when operated under LVPECLClock-Distribution Applications conditions. The CDCLVP110is specifically designed• VBB Reference Voltage Output for for driving 50-Ω transmission lines.Single-Ended Clocking
The VBB reference voltage output is usedif• Availableina 32-Pin LQFP Package single-ended input operationis required.In this case• Frequency Range From DCto 3.5 GHz the VBB pin should be connected to CLK0 and
bypassedto GND• Pin-to-Pin Compatible With MC100 Series
EP111, ES6111, LVEP111, PTN1111
However, for high-speed
the differentialspacer
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The CDCLVP110is characterized for operation from
–40°Cto 85°C.
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Table1. FUNCTION TABLE
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