CDCE937QPWRQ1 ,Automotive Catalog Programmable 3-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs 20-TSSOP -40 to 125Features 2 Applications1• Qualified for Automotive Applications • Clusters• AEC-Q100 Qualified With ..
CDCE949PW ,Programmable 4-PLL VCXO Clock Synthesizer with 2.5V or 3.3V LVCMOS Outputs 24-TSSOP -40 to 85 SCAS844F–AUGUST 2007–REVISED OCTOBER 2016Changes from Revision B (September 2009) to Revision C Pa ..
CDCE949PWR ,Programmable 4-PLL VCXO Clock Synthesizer with 2.5V or 3.3V LVCMOS Outputs 24-TSSOP -40 to 85Features 2 ApplicationsD-TVs, STBs, IP-STBs, DVD Players, DVD1• Member of Programmable Clock Genera ..
CDCE949QPWRQ1 ,Automotive Catalog Programmable 4-PLL VCXO Clock Synthesizer with 2.5V or 3.3V LVCMOS Outputs 24-TSSOP -40 to 125This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated cir ..
CDCEL913PW ,Programmable 1-PLL VCXO Clock Synthesizer with 1.8-V LVCMOS Outputs 14-TSSOP -40 to 85Features 3 DescriptionThe CDCE913 and CDCEL913 devices are modular1• Member of Programmable Clock G ..
CDCEL913PWR ,Programmable 1-PLL VCXO Clock Synthesizer with 1.8-V LVCMOS Outputs 14-TSSOP -40 to 85Block Diagram... 10Information..... 284 Revision HistoryNOTE: Page numbers for previous revisions m ..
CL331-0471-0-10 , SMT Ultra-Miniature Coaxial Connectors-Mating Heights Owing to the Lowest Profile and the Lightest
CL331-0471-0-10 , SMT Ultra-Miniature Coaxial Connectors-Mating Heights Owing to the Lowest Profile and the Lightest
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CL431 , Precision Adjustable Shunt Reference
CL431 , Precision Adjustable Shunt Reference
CL431 , Precision Adjustable Shunt Reference
CDCE937QPWRQ1
Automotive Catalog Programmable 3-PLL VCXO Clock Synthesizer with 2.5-V or 3.3-V LVCMOS Outputs 20-TSSOP -40 to 125
VDD GND
Vctr
Vddout
S2/S1/S0 or
SDA/SCL
Crystal or
Clock InputVCXO
LVCMOS
CMOS
CMOS
PLL1
with SSC
CMOS
CMOS
CMOS
PLL2
with SSC
Divider
and
Output
Control
Programming
and
Control Register
EEPROM
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CDCE937-Q1, CDCEL937-Q1SCAS892C –FEBRUARY 2010–REVISED DECEMBER 2016
CDCEx937-Q1 Programmable 3-PLL VCXO Clock Synthesizer
With 1.8-V, 2.5-V, and 3.3-V LVCMOS Outputs Features Qualifiedfor Automotive Applications AEC-Q100 Qualified With the Following Results: Device Temperature Grade1: –40°Cto 125°C
Ambient Operating Temperature Range Device HBM ESD Classification Level2 Device CDM ESD Classification Level C4B In-System Programmability and EEPROM Serial Programmable Volatile Register Nonvolatile EEPROMto Store Customer
Setting Flexible Input Clocking Concept External Crystal:8 MHzto32 MHz On-Chip VCXO: Pull Range ±150 ppm Single-Ended LVCMOSupto 160 MHz Free Selectable Output Frequencyupto 230 MHz Low-Noise PLL Core Integrated PLL Loop Filter Components Low Period Jitter (Typical60 ps) Separate Output Supply Pins CDCE937-Q1: 3.3V and 2.5V CDCEL937-Q1: 1.8V Flexible Clock Driver Three User-Definable Control Inputs
[S0/S1/S2]; for Example: SSC Selection,
Frequency Switching, Output Enableor Power
Down Generates Highly Accurate Clocks for Video,
Audio, USB, IEEE1394, RFID, Bluetooth™,
WLAN, Ethernet™, and GPS Generates Common Clock Frequencies Used
With TI-DaVinci™, OMAP™, DSPs SSC Modulation Clock Generation Supplyto 125°C Kitfor Easy PLL
Applications Clusters Head Units Navigation Systems Advanced Driver Assistance Systems (ADAS)
DescriptionThe CDCE937-Q1 and CDCEL937-Q1 devices are
modular, phase-locked loop (PLL) based
programmable clock synthesizers. These devices
provide flexible and programmable options, such as
output clocks, input signals, and control pins,so that
the user can configure the CDCEx937-Q1 for their
own specifications.
The CDCEx937-Q1 generates upto seven output
clocks froma single input frequencyto enable both
board space and cost savings. Additionally, with
multiple outputs, the clock generator can replace
multiple crystals with one clock generator. This
makes the device well-suited for head unit and
telematics applicationsin infotainment and camera
systemsin ADASas these platforms are evolving into
smaller and more cost effective systems.
Device Information(1)(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Simplified Block Diagram
