CDC111FN ,3.3V LVPECL Differential Clock Driver CDC111 1-LINE TO 9-LINE DIFFERENTIAL LVPECL CLOCK DRIVER SCAS321G – SEPTEMBER 1993 – REVISED AUGUS ..
CDC204 ,5V 6-Bit Inverter / Clock Driver CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998DW PACKAGE* CDC204 R ..
CDC204DW ,5V 6-Bit Inverter / Clock Driverlogic diagram (positive logic)20 120 11A 1 1Y1A 1Y19 22A 2Y18 319 23A 3Y2A 2Y13 84A 4Y12 95A 5Y 18 ..
CDC204DWR ,5V 6-Bit Inverter / Clock Drivermaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CDC204DWRG4 ,5V 6-Bit Inverter / Clock Driver 20-SOIC maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
CDC204N ,5V 6-Bit Inverter / Clock Drivermaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
CL2431VS , Precision Adjustable Shunt Reference
CL-25 , Simple 90V, 25mA, Temperature Compensated, Constant Current, LED Driver IC
CL331-0471-0-10 , SMT Ultra-Miniature Coaxial Connectors-Mating Heights Owing to the Lowest Profile and the Lightest
CL331-0471-0-10 , SMT Ultra-Miniature Coaxial Connectors-Mating Heights Owing to the Lowest Profile and the Lightest
CL331-0471-0-10 , SMT Ultra-Miniature Coaxial Connectors-Mating Heights Owing to the Lowest Profile and the Lightest
CL431 , Precision Adjustable Shunt Reference
CDC111FN
3.3V LVPECL Differential Clock Driver
Differential Clock Outputs Output Reference Voltage, VREF, Allows
Distribution From a Single-Ended Clock
Input Single-Ended LVPECL-Compatible Output
Enable Packaged in Plastic Chip Carrier
descriptionThe differential LVPECL clock-driver circuit
distributes one pair of differential LVPECL clock
inputs (CLKIN, CLKIN) to nine pairs of differential
clock (Y , Y) outputs with minimum skew for clock
distribution. It is specifically designed for driving
50-W transmission lines.
When the output-enable (OE) is low, the nine differential outputs switch at the same frequency as the differential
clock inputs. When OE is high, the nine differential outputs are in static states (Y outputs are in the low state,
Y outputs are in the high state).
The VREF output can be strapped to the CLKIN input for a single-ended CLKIN input.
The CDC111 is characterized for operation from 0°C to 70°C.
FUNCTION TABLEPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
VCC0
VCC0Y4
V Y3Y3
CC0
NC – No internal connection
