CD74HCT670E ,High Speed CMOS Logic 4-by-4 Register FileMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HCT670E ,High Speed CMOS Logic 4-by-4 Register FileFeatures Description• Simultaneous and Independent Read and Write The ’HC670 and CD74HCT670 are 16- ..
CD74HCT688E ,High Speed CMOS Logic 8-Bit Magnitude ComparatorMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HCT688M ,High Speed CMOS Logic 8-Bit Magnitude ComparatorFeatures Description• Cascadable The ’HC688 and ’HCT688 are 8-bit magnitude comparatorsdesigned for ..
CD74HCT688M ,High Speed CMOS Logic 8-Bit Magnitude ComparatorCD54HC688, CD74HC688,CD54HCT688, CD74HCT688Data sheet acquired from Harris SemiconductorSCHS196CHig ..
CD74HCT688M96 ,High Speed CMOS Logic 8-Bit Magnitude ComparatorFeatures Description• Cascadable The ’HC688 and ’HCT688 are 8-bit magnitude comparatorsdesigned for ..
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CD74HCT670E
High Speed CMOS Logic 4-by-4 Register File
CD54HC670, CD74HC670, CD74HCT670 SCHS195C High-Speed CMOS Logic January 1998 - Revised October 2003 4x4 Register File Features Description • Simultaneous and Independent Read and Write The ’HC670 and CD74HCT670 are 16-bit register files Operations organized as 4 words x 4 bits each. Read and write address [ /Title and enable inputs allow simultaneous writing into one location • Expandable to 512 Words of n-Bits (CD74H while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) • Three-State Outputs C670, determine the location of the stored word in the register. CD74H • Organized as 4 Words x 4 Bits Wide When write enable (WE) is low the word is entered into the CT670) address location and it remains transparent to the data. The • Buffered Inputs outputs will reflect the true form of the input data. When (WE) /Subject = 5V, C = • Typical Read Time = 16ns for ’HC670 V CC L is high data and address inputs are inhibited. Data acquisition (High- o 15pF, T = 25 C A from the four registers is made possible by the read address Speed inputs (RA1 and RA0). The addressed word appears at the • Fanout (Over Temperature Range) CMOS output when the read enable (RE) is low. The output is in the - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads high impedance state when the (RE) is high. Outputs can be Logic - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads tied together to increase the word capacity to 512 x 4 bits. 4x4 Reg- o o • Wide Operating Temperature Range . . . -55 C to 125 C Ordering Information ister • Balanced Propagation Delay and Transition Times TEMP. RANGE o PART NUMBER ( C) PACKAGE • Significant Power Reduction Compared to LSTTL CD54HC670F3A -55 to 125 16 Ld CERDIP Logic ICs CD74HC670E -55 to 125 16 Ld PDIP • HC Types CD74HC670M -55 to 125 16 Ld SOIC - 2V to 6V Operation CD74HC670MT -55 to 125 16 Ld SOIC = 30%, N = 30% of V - High Noise Immunity: N IL IH CC at V = 5V CD74HC670M96 -55 to 125 16 Ld SOIC CC CD74HCT670E -55 to 125 16 Ld PDIP • HCT Types CD74HCT670M -55 to 125 16 Ld SOIC - 4.5V to 5.5V Operation CD74HCT670MT -55 to 125 16 Ld SOIC - Direct LSTTL Input Logic Compatibility, V = 0.8V (Max), V = 2V (Min) CD74HCT670M96 -55 to 125 16 Ld SOIC IL IH ≤ 1µA at V , V - CMOS Input Compatibility, I l OL OH NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. Pinout CD54HC670 (CERDIP) CD74HC670, CD74HCT670 (PDIP, SOIC) TOP VIEW D1 1 16 V CC D2 2 15 D0 D3 3 14 WA0 RA1 4 13 WA1 RA0 5 12 WE Q3 6 11 RE 10 Q0 Q2 7 9 Q1 GND 8 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
