CD74HC4020E ,High Speed CMOS Logic 14-Stage Binary CounterMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC4024E ,7-stage binary ripple counterMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC4024M ,7-stage binary ripple counterFeatures Description• Fully Static Operation The ’HC4024 and ’HCT4024 are 7-stage ripple-carry bina ..
CD74HC4024M ,7-stage binary ripple counterLogic Diagram1CP Q CP Q CP Q CP Q CP Q CP Q CP QCP1 Q1 2 3 4 5 6 7CP Q CP Q CP Q CP Q CP Q CP Q CP ..
CD74HC4024PWR ,High Speed CMOS Logic 7-Stage Binary Ripple CounterCD54HC4024, CD74HC4024,CD54HCT4024, CD74HCT4024Data sheet acquired from Harris SemiconductorSCHS202 ..
CD74HC4040 ,High Speed CMOS Logic 12-Stage Binary CounterLogic Diagram310CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP Q CP QCPI Q’ 2 3 4 5 6 7 8 9 1 ..
CKG57KX7R1C476M , Multilayer Ceramic Chip Capacitors
CL ,Wirewound Resistors, Commercial Power, Tab Type Terminals, Variety of core diameters and lengths, Numerous mounting hole sizes and shapes, High performance for low cost , contact ww2aresistors Document Number 3022244 Revision 04-Sep-02CLWirewound Resistors, Commercia ..
CL10C101JBNC , Multilayer Ceramic Capacitor
CD74HC4020E
High Speed CMOS Logic 14-Stage Binary Counter
CD54HC4020, CD74HC4020, CD54HCT4020, CD74HCT4020 SCHS201C High-Speed CMOS Logic February 1998 - Revised October 2003 14-Stage Binary Counter Features Description • Fully Static Operation The ’HC4020 and ’HCT4020 are 14-stage ripple-carry binary counters. All counter stages are master-slave flip- • Buffered Inputs [ /Title flops. The state of the stage advances one count on the (CD74 negative clock transition of each input pulse; a high voltage • Common Reset level on the MR line resets all counters to their zero state. All HC402 • Negative Edge Clocking inputs and outputs are buffered. 0, • Fanout (Over Temperature Range) CD74 Ordering Information - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads HCT40 - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads TEMP. RANGE 20) o PART NUMBER ( C) PACKAGE o o C to 125 C • Wide Operating Temperature Range . . . -55 /Sub- CD54HC4020F3A -55 to 125 16 Ld CERDIP ject • Balanced Propagation Delay and Transition Times (High CD54HCT4020F3A -55 to 125 16 Ld CERDIP • Significant Power Reduction Compared to LSTTL Speed Logic ICs CD74HC4020E -55 to 125 16 Ld PDIP CMOS • HC Types CD74HC4020M -55 to 125 16 Ld SOIC - 2V to 6V Operation CD74HC4020MT -55 to 125 16 Ld SOIC - High Noise Immunity: N = 30%, N = 30% of V IL IH CC at V = 5V CC CD74HC4020M96 -55 to 125 16 Ld SOIC • HCT Types CD74HCT4020E -55 to 125 16 Ld PDIP - 4.5V to 5.5V Operation CD74HCT4020M -55 to 125 16 Ld SOIC - Direct LSTTL Input Logic Compatibility, V = 0.8V (Max), V = 2V (Min) IL IH CD74HCT4020MT -55 to 125 16 Ld SOIC - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HCT4020M96 -55 to 125 16 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. Pinout CD54HC4020, CD54HCT4020 (CERDIP) CD74HC4020, CD74HCT4020 (PDIP, SOIC) TOP VIEW Q 1 16 V CC 12 Q 2 15 Q 13 11 Q 3 14 Q 14 10 Q6 4 13 Q 8 Q 5 12 Q 5 9 Q 6 11 MR 7 10 CP Q 7 4 9 Q ‘ GND 8 1 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
