CD74HC374M96 ,High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State OutputsMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC377M ,High Speed CMOS Logic Octal D-Type Flip-Flops with Data EnableFeatures Description• Buffered Common Clock The ’HC377 and ’HCT377 are octal D-type flip-flops with a ..
CD74HC377M ,High Speed CMOS Logic Octal D-Type Flip-Flops with Data EnableMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC377M ,High Speed CMOS Logic Octal D-Type Flip-Flops with Data EnableCD54HC377, CD74HC377,CD54HCT377, CD74HCT377Data sheet acquired from Harris SemiconductorSCHS184CHig ..
CD74HC390E ,High Speed CMOS Logic Dual Decade Ripple CountersFeatures Description• Two BCD Decade or Bi-Quinary Counters The CD74HC390 and ’HCT390 dual 4-bit de ..
CD74HC390M96 ,High Speed CMOS Logic Dual Decade Ripple CountersMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CKG57KX7R1C476M , Multilayer Ceramic Chip Capacitors
CL ,Wirewound Resistors, Commercial Power, Tab Type Terminals, Variety of core diameters and lengths, Numerous mounting hole sizes and shapes, High performance for low cost , contact ww2aresistors Document Number 3022244 Revision 04-Sep-02CLWirewound Resistors, Commercia ..
CL10C101JBNC , Multilayer Ceramic Capacitor
CD74HC374E-CD74HC374M-CD74HC374M96
High Speed CMOS Logic Octal Positive-Edge-Triggered D-Type Flip-Flops with 3-State Outputs
CD54/74HC374, CD54/74HCT374, CD54/74HC574, CD54/74HCT574 SCHS183C High-Speed CMOS Logic Octal D-Type Flip-Flop, February 1998 - Revised May 2004 3-State Positive-Edge Triggered Features Description • Buffered Inputs The ’HC374, ’HCT374, ’HC574, and ’HCT574 are octal D-type flip-flops with 3-state outputs and the capability to drive 15 • Common Three-State Output Enable Control [ /Title LSTTL loads. The eight edge-triggered flip-flops enter data into (CD74 their registers on the LOW to HIGH transition of clock (CP). The • Three-State Outputs output enable (OE) controls the 3-state outputs and is HC374 • Bus Line Driving Capability independent of the register operation. When OE is HIGH, the , outputs are in the high-impedance state. The 374 and 574 are • Typical Propagation Delay (Clock to Q) = 15ns at D74 C o identical in function and differ only in their pinout arrangements. = 5V, C = 15pF, T = 25 C V CC L A HCT37 • Fanout (Over Temperature Range) Ordering Information 4, - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads CD74 TEMP. RANGE - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads o PART NUMBER ( C) PACKAGE HC574 o o • Wide Operating Temperature Range . . . -55 C to 125 C CD54HC374F3A -55 to 125 20 Ld CERDIP , CD54HC574F3A -55 to 125 20 Ld CERDIP • Balanced Propagation Delay and Transition Times D74 C CD54HCT374F3A -55 to 125 20 Ld CERDIP HCT57 • Significant Power Reduction Compared to LSTTL CD54HCT574F3A -55 to 125 20 Ld CERDIP Logic ICs CD74HC374E -55 to 125 20 Ld PDIP • HC Types CD74HC374M -55 to 125 20 Ld SOIC - 2-V to 6-V Operation CD74HC374M96 -55 to 125 20 Ld SOIC - High Noise Immunity: N = 30%, N = 30% of V IL IH CC CD74HC574E -55 to 125 20 Ld PDIP at V = 5V CC CD74HC574M -55 to 125 20 Ld SOIC • HCT Types CD74HC574M96 -55 to 125 20 Ld SOIC - 4.5-V to 5.5-V Operation CD74HCT374E -55 to 125 20 Ld PDIP - Direct LSTTL Input Logic Compatibility, CD74HCT374M -55 to 125 20 Ld SOIC V = 0.8V (Max), V = 2V (Min) IL IH CD74HCT374M96 -55 to 125 20 Ld SOIC - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HCT574E -55 to 125 20 Ld PDIP CD74HCT574M -55 to 125 20 Ld SOIC CD74HCT574M96 -55 to 125 20 Ld SOIC CD74HCT574PWR -55 to 125 20 Ld TSSOP NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2004, 1
