CD74HC237M ,High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address LatchesBlock DiagramA015LEY01Ap014A0nYLE 1LEp13Yn 212LEY3A12AA1 LATCH1 A 110Y410A Y2 53AA2 LATCH2 A29Y6LE4 ..
CD74HC237M ,High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address LatchesFeaturesthat can be latched by an active High Latch Enable (LE)• Select One of Eight Data Outputssi ..
CD74HC237M96 ,High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address LatchesMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD74HC237NSR ,High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address LatchesFeaturesthat can be latched by an active High Latch Enable (LE)• Select One of Eight Data Outputssi ..
CD74HC238E ,High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-InvertingMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD74HC238NSR ,High Speed CMOS Logic 3-to-8 Line Decoder Demultiplexer Inverting and Non-InvertingFeatures Ordering Information• Select One Of Eight Data OutputsTEMP. RANGEActive Low for 138, Activ ..
CKG57KX7R1C476M , Multilayer Ceramic Chip Capacitors
CL ,Wirewound Resistors, Commercial Power, Tab Type Terminals, Variety of core diameters and lengths, Numerous mounting hole sizes and shapes, High performance for low cost , contact ww2aresistors Document Number 3022244 Revision 04-Sep-02CLWirewound Resistors, Commercia ..
CL10C101JBNC , Multilayer Ceramic Capacitor
CD74HC237E-CD74HC237M-CD74HC237M96-CD74HC237NSR
High Speed CMOS Logic 3-to-8 Line Decoder Demutiplexer with Address Latches
CD74HC137, CD74HCT137, CD54HC237, CD74HC237, CD74HCT237 SCHS146F High-Speed CMOS Logic, 3- to 8-Line March 1998 - Revised October 2003 Decoder/Demultiplexer with Address Latches Both circuits have three binary select inputs (A0, A1 and A2) Features that can be latched by an active High Latch Enable (LE) • Select One of Eight Data Outputs signal to isolate the outputs from select-input changes. A - Active Low for CD74HC137 and CD74HCT137 “Low” LE makes the output transparent to the input and the [ /Title circuit functions as a one-of-eight decoder. Two Output - Active High for ’HC237 and CD74HCT237 (CD74 Enable inputs (OE and OE ) are provided to simplify 1 0 • l/O Port or Memory Selector cascading and to facilitate demultiplexing. The HC137 demultiplexing function is accomplished by using the A ,A , • Two Enable Inputs to Simplify Cascading 0 1 , A inputs to select the desired output and using one of the 2 D74 C • Typical Propagation Delay of 13ns at V = 5V, other Output Enable inputs as the data input while holding CC o 15pF, T = 25 C (CD74HC237) HCT13 the other Output Enable input in its active state. In the A CD74HC137 and CD74HCT137 the selected output is a 7, • Fanout (Over Temperature Range) “Low”; in the ’HC237 and CD74HCT237 the selected output is CD74 - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads a “High”. HC237 - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads , o o Ordering Information • Wide Operating Temperature Range . . . -55 C to 125 C D74 C • Balanced Propagation Delay and Transition Times TEMP. RANGE HCT23 o PART NUMBER ( C) PACKAGE • Significant Power Reduction Compared to LSTTL 7) Logic ICs CD54HC237F3A -55 to 125 16 Ld CERDIP /Sub- • HC Types CD74HC137E -55 to 125 16 Ld PDIP ject - 2V to 6V Operation (High CD74HC137PW -55 to 125 16 Ld TSSOP - High Noise Immunity: N = 30%, N = 30%, of V IL IH CC Speed at V = 5V CC CD74HC137PWR -55 to 125 16 Ld TSSOP • HCT Types CD74HC137PWT -55 to 125 16 Ld TSSOP - 4.5V to 5.5V Operation CD74HC237E -55 to 125 16 Ld PDIP - Direct LSTTL Input Logic Compatibility, V = 0.8V (Max), V = 2V (Min) IL IH CD74HC237M -55 to 125 16 Ld SOIC - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HC237MT -55 to 125 16 Ld SOIC Description CD74HC237M96 -55 to 125 16 Ld SOIC The CD74HC137, CD74HCT137, ’HC237, and CD74HC237NSR -55 to 125 16 Ld SOP CD74HCT237 are high speed silicon gate CMOS decoders CD74HC237PW -55 to 125 16 Ld TSSOP well suited to memory address decoding or data routing applications. Both circuits feature low power consumption CD74HC237PWR -55 to 125 16 Ld TSSOP usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. CD74HC237PWT -55 to 125 16 Ld TSSOP CD74HCT137E -55 to 125 16 Ld PDIP CD74HCT137MT -55 to 125 16 Ld SOIC CD74HCT137M96 -55 to 125 16 Ld SOIC CD74HCT237E -55 to 125 16 Ld PDIP NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity reel of 250. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
