CD74HC08M ,High Speed CMOS Logic Quad 2-Input AND GatesMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC08M96 ,High Speed CMOS Logic Quad 2-Input AND GatesMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC08M96G4 ,High Speed CMOS Logic Quad 2-Input AND Gates 14-SOIC -55 to 125Features Description• Buffered Inputs The CD54HC08, CD54HCT08, CD74HC08, andCD74HCT08 logic gates u ..
CD74HC107E ,High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with ResetMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74HC107M ,High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with ResetCD54HC107, CD74HC107,CD74HCT107Data sheet acquired from Harris SemiconductorSCHS139DDual J-K Flip-F ..
CD74HC107M96G4 ,High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125Maximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CIUH11D66 , INVERTER
CJ7805 , Three-terminal positive voltage regulator
CJ7808 , Three-terminal positive voltage regulator
CJ7808 , Three-terminal positive voltage regulator
CJ78L06 , THREE TERMINAL POSITIVE VOLTAGE REGULATOR
CJ78L06 , THREE TERMINAL POSITIVE VOLTAGE REGULATOR
CD74HC08-CD74HC08E-CD74HC08M-CD74HC08M96-CD74HC08M96G4
High Speed CMOS Logic Quad 2-Input AND Gates
CD54HC08, CD74HC08, CD54HCT08, CD74HCT08 SCHS118C High-Speed CMOS Logic Quad 2-Input AND Gate August 1997 - Revised July 2004 Features Description • Buffered Inputs The CD54HC08, CD54HCT08, CD74HC08, and CD74HCT08 logic gates utilize silicon gate CMOS = 5V, • Typical Propagation Delay: 7ns at V [ /Title CC technology to achieve operating speeds similar to LSTTL o C = 15pF, T = 25 C L A (CD54H gates with the low power consumption of standard CMOS integrated circuits. All devices have the ability to drive 10 • Fanout (Over Temperature Range) C08, LSTTL loads. The 74HCT logic family is functionally pin - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads CD54H compatible with the standard 74LS logic family. - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads CT08, o o • Wide Operating Temperature Range . . . -55 C to 125 C CD74H Ordering Information C08, • Balanced Propagation Delay and Transition Times TEMP. RANGE CD74H o PART NUMBER ( C) PACKAGE • Significant Power Reduction Compared to LSTTL CT08) Logic ICs CD54HC08F3A -55 to 125 14 Ld CERDIP /Sub- • HC Types CD54HCT08F3A -55 to 125 14 Ld CERDIP ject - 2V to 6V Operation (High CD74HC08E -55 to 125 14 Ld PDIP - High Noise Immunity: N = 30%, N = 30% of V IL IH CC at V = 5V CC CD74HC08M -55 to 125 14 Ld SOIC • HCT Types CD74HC08MT -55 to 125 14 Ld SOIC - 4.5V to 5.5V Operation CD74HC08M96 -55 to 125 14 Ld SOIC - Direct LSTTL Input Logic Compatibility, V = 0.8V (Max), V = 2V (Min) IL IH CD74HC08PW -55 to 125 14 Ld TSSOP ≤ 1µA at V , V • CMOS Input Compatibility, I l OL OH CD74HC08PWR -55 to 125 14 Ld TSSOP CD74HCT08E -55 to 125 14 Ld PDIP CD74HCT08M -55 to 125 14 Ld SOIC CD74HCT08MT -55 to 125 14 Ld SOIC CD74HCT08M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2004, 1
