CD74ACT273M96 ,Octal D-Type Flip-Flops with ResetFeatures Description• Buffered Inputs The ’AC273 and ’ACT273 devices are octal D-type flip-flopswith ..
CD74ACT273SM , Octal D Flip-Flop with Reset
CD74ACT273SM , Octal D Flip-Flop with Reset
CD74ACT273SM96G4 ,Octal D-Type Flip-Flops with Reset 20-SSOP -55 to 125Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operati ..
CD74ACT280E ,9-Bit Odd/Even Parity Generator/CheckerMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD74ACT280E ,9-Bit Odd/Even Parity Generator/CheckerFeaturesHIGH) when an odd number of data inputs is HIGH. Parity• Buffered Inputschecking for words ..
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL21NR10KNE , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CD74ACT273E-CD74ACT273M-CD74ACT273M96-CD74ACT273SM96G4
Octal D-Type Flip-Flops with Reset
CD54AC273, CD74AC273 CD54ACT273, CD74ACT273 SCHS249B August 1998 - Revised July 2002 Octal D Flip-Flop with Reset Features Description • Buffered Inputs The ’AC273 and ’ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. • Typical Propagation Delay Information at the D input is transferred to the Q output on o - 6.5ns at V = 5V, T = 25 C, C = 50pF CC A L the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset • Exceeds 2kV ESD Protection MIL-STD-883, Method (MR). Resetting is accomplished by a low voltage level 3015 independent of the clock. • SCR-Latchup-Resistant CMOS Process and Circuit Design Ordering Information • Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption PART TEMPERATURE NUMBER RANGE PACKAGE • Balanced Propagation Delays o o CD74AC273E 0 C to 70 C 20 Ld PDIP • AC Types Feature 1.5V to 5.5V Operation and o o -40 C to 85 C o o Balanced Noise Immunity at 30% of the Supply -55 C to 125 C o o • ±24mA Output Drive Current CD54AC273F3A -55 C to 125 C 20 Ld CDIP o o - Fanout to 15 FAST™ ICs CD74ACT273E 0 C to 70 C 20 Ld PDIP o o -40 C to 85 C - Drives 50Ω Transmission Lines o o -55 C to 125 C o o CD54ACT273F3A -55 C to 125 C 20 Ld CDIP o o Pinout CD74AC273M 0 C to 70 C 20 Ld SOIC o o -40 C to 85 C CD54AC273, CD54ACT273 o o -55 C to 125 C (CDIP) o o CD74ACT273M 0 C to 70 C 20 Ld SOIC CD74AC273, CD74ACT273 o o -40 C to 85 C (PDIP, SOIC) o o -55 C to 125 C TOP VIEW NOTES: MR 1 20 V CC 1. When ordering, use the entire part number. Add the suffix 96 to Q0 2 19 Q7 obtain the variant in the tape and reel. D0 3 18 D7 2. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office for D1 4 17 D6 ordering information. Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 CP CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. FAST™ is a Fairchild Semiconductor. 1 Copyright © 2002,
