CD74ACT163M ,Synchronous Presettable Binary Counters with Synchronous Resetlogic diagram (positive logic)9LOAD10ENT15RCO†LD7ENP†CK2CLK1CK LDCLRRM1G21, 2T/1C3 14QAG43A 3D4RM1G ..
CD74ACT164 ,8-Bit Serial-In/Parallel-Out Shift RegisterFeatures Description[ /Title• Buffered Inputs The ’AC164 and ’ACT164 are 8-bit serial-in/parallel-o ..
CD74ACT164E ,8-Bit Serial-In/Parallel-Out Shift RegisterFeatures Description[ /Title• Buffered Inputs The ’AC164 and ’ACT164 are 8-bit serial-in/parallel-o ..
CD74ACT164E ,8-Bit Serial-In/Parallel-Out Shift RegisterCD54/74AC164,CD54/74ACT164Data sheet acquired from Harris SemiconductorSCHS240A8-Bit Serial-In/Para ..
CD74ACT164M ,8-Bit Serial-In/Parallel-Out Shift RegisterMaximum Ratings” may cause permanent damage to the device. This is a stress only rating and operati ..
CD74ACT164M96 ,8-Bit Serial-In/Parallel-Out Shift RegisterMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CIH10T6N8JNC , Chip Inductor; CIH Series
CIH10T6N8JNC , Chip Inductor; CIH Series
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CD74ACT163E-CD74ACT163M
Synchronous Presettable Binary Counters with Synchronous Reset
Synchronously Programmabledescription/ordering informationThe ’ACT163 devices are 4-bit binary counters.
These synchronous, presettable counters feature
an internal carry look-ahead for application in
high-speed counting designs. Synchronous
operation is provided by having all flip-flops
clocked simultaneously so that the outputs change, coincident with each other, when instructed by the
count-enable (ENP, ENT) inputs and internal gating. This mode of operation eliminates the output counting
spikes normally associated with synchronous (ripple-clock) counters. A buffered clock (CLK) input triggers the
four flip-flops on the rising (positive-going) edge of the clock waveform.
The counters are fully programmable; that is, they can be preset to any number between 0 and 9 or 15.
Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes
the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.
The clear function is synchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low
after the next low-to-high transition of CLK, regardless of the levels of the enable inputs. This synchronous clear
allows the count length to be modified easily by decoding the Q outputs for the maximum count desired. The
active-low output of the gate used for decoding is connected to CLR to synchronously clear the counter to 0000
(LLLL).
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without
additional gating. ENP, ENT, and a ripple-carry output (RCO) are instrumental in accomplishing this function.
Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a
high-level pulse while the count is maximum (9 or 15, with QA high). This high-level overflow ripple-carry pulse
can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the
level of CLK.
These devices feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of
the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the
stable setup and hold times.
ORDERING INFORMATIONPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ENP
GNDAD
ENT
LOAD
