CD54HCT30F3A ,High Speed CMOS Logic 8-Input NAND GateFeatures Description• Buffered Inputs The ’HC30 and ’HCT30 each contain an 8-input NAND gatein one ..
CD54HCT30F3A ,High Speed CMOS Logic 8-Input NAND Gate CD54/74HC30,CD54/74HCT30Data sheet acquired from Harris SemiconductorSCHS121DHigh Speed CMOS Logic ..
CD54HCT30F3A ,High Speed CMOS Logic 8-Input NAND GateMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT32F ,High Speed CMOS Logic Quad Two-Input OR GatesMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT32F. ,High Speed CMOS Logic Quad Two-Input OR GatesFeatures Description• Typical Propagation Delay: 7ns at V = 5V, The ’HC32 and ’HCT32 contain four 2 ..
CD54HCT32F3A ,High Speed CMOS Logic Quad Two-Input OR GatesMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CIH10T6N8JNC , Chip Inductor; CIH Series
CIH10T6N8JNC , Chip Inductor; CIH Series
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10NR10KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CIL10Y100KNC , It has ferrite and 100% Ag as internal conductors, the CIL Series has excellent Q characteristics and eliminate crosstalk.
CD54HCT30F3A
High Speed CMOS Logic 8-Input NAND Gate
CD54/74HC30, CD54/74HCT30 SCHS121D High Speed CMOS Logic August 1997 - Revised September 2003 8-Input NAND Gate Features Description • Buffered Inputs The ’HC30 and ’HCT30 each contain an 8-input NAND gate in one package. They provide the system designer with the = 5V, • Typical Propagation Delay: 10ns at V [ /Title CC direct implementation of the positive logic 8-input NAND o C = 15pF, T = 25 C L A (CD54H function. Logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the • Fanout (Over Temperature Range) C30, low power consumption of standard CMOS integrated cir- - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads CD74H cuits. All devices have the ability to drive 10 LSTTL loads. - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads C30, The HCT logic family is functionally pin compatible with the o o • Wide Operating Temperature Range . . . -55 C to 125 C standard LS logic family. CD74H CT30) • Balanced Propagation Delay and Transition Times Ordering Information /Subject • Significant Power Reduction Compared to LSTTL (High Logic ICs TEMP. RANGE o PART NUMBER ( C) PACKAGE Speed • HC Types CMOS CD54HC30F3A -55 to 125 14 Ld CERDIP - 2V to 6V Operation Logic 8- - High Noise Immunity: N = 30%, N = 30% of V IL IH CC CD54HCT30F3A -55 to 125 14 Ld CERDIP at V = 5V CC CD74HC30E -55 to 125 14 Ld PDIP • HCT Types CD74HC30M -55 to 125 14 Ld SOIC - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, CD74HC30MT -55 to 125 14 Ld SOIC V = 0.8V (Max), V = 2V (Min) IL IH CD74HC30M96 -55 to 125 14 Ld SOIC - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HC30NSR -55 to 125 14 Ld SOP CD74HC30PW -55 to 125 14 Ld TSSOP Pinout CD74HC30PWR -55 to 125 14 Ld TSSOP CD54HC30, CD54HCT30 (CERDIP) CD74HC30 (PDIP, SOIC, SOP, TSSOP) CD74HC30PWT -55 to 125 14 Ld TSSOP CD74HCT30 (PDIP, SOIC) TOP VIEW CD74HCT30E -55 to 125 14 Ld PDIP A 1 14 V CD74HCT30M -55 to 125 14 Ld SOIC CC B 2 13 NC CD74HCT30MT -55 to 125 14 Ld SOIC C 3 12 H CD74HCT30M96 -55 to 125 14 Ld SOIC D 4 11 G E 5 10 NC NOTE: When ordering, use the entire part number. The suffixes 96 and R denote tape and reel. The suffix T denotes a small-quantity F 6 9 NC reel of 250. GND 7 8 Y CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, . 1
