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CD54HCT157F3AN/a10avaiHigh Speed CMOS Logic Quad 2-Input Multiplexers
CD54HCT157F3ATIN/a500avaiHigh Speed CMOS Logic Quad 2-Input Multiplexers
CD54HCT157F3AHARRISN/a10avaiHigh Speed CMOS Logic Quad 2-Input Multiplexers
CD54HCT157F3ATI,TIN/a500avaiHigh Speed CMOS Logic Quad 2-Input Multiplexers


CD54HCT157F3A ,High Speed CMOS Logic Quad 2-Input MultiplexersFeatures Description• Common Select Inputs The ’HC157, ’HCT157, ’HC158, and ’HCT158 are quad 2-inpu ..
CD54HCT157F3A ,High Speed CMOS Logic Quad 2-Input MultiplexersMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT163F ,High Speed CMOS Logic 4-Bit Binary Counter with Synchronous ResetMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT163F ,High Speed CMOS Logic 4-Bit Binary Counter with Synchronous ResetFeaturesprovided for n-bit cascading. In all counters reset action• ’HC161, ’HCT161 4-Bit Binary Co ..
CD54HCT163F3A ,High Speed CMOS Logic 4-Bit Binary Counter with Synchronous ResetMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HCT163F3A ,High Speed CMOS Logic 4-Bit Binary Counter with Synchronous ResetCD54/74HC161, CD54/74HCT161,The CD54HCT161 is obsoleteand no longer is supplied.CD54/74HC163, CD54/ ..
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CD54HCT157F3A
High Speed CMOS Logic Quad 2-Input Multiplexers
The CD54HC158 and CD54/74HC157, CD54/74HCT157, CD74HC158 are obsolete and CD54/74HC158, CD54/74HCT158 no longer are supplied. SCHS153C High-Speed CMOS Logic Quad 2-Input Multiplexers September 1997 - Revised October 2003 Features Description • Common Select Inputs The ’HC157, ’HCT157, ’HC158, and ’HCT158 are quad 2- input multiplexers which select four bits of data from two • Separate Enable Inputs [ /Title sources under the control of a common Select input (S). The (CD74H Enable input (E) is active Low. When (E) is High, all of the • Buffered inputs and Outputs outputs in the 158, the inverting type, (1Y-4Y) are forced C157, • Fanout (Over Temperature Range) High and in the 157, the non-inverting type, all of the outputs CD74H - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads (1Y-4Y) are forced Low, regardless of all other input CT157, - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads conditions. CD74H o o • Wide Operating Temperature Range . . . -55 C to 125 C Moving data from two groups of registers to four common C158, output buses is a common use of these devices. The state of • Balanced Propagation Delay and Transition Times the Select input determines the particular register from CD74H which the data comes. They can also be used as function • Significant Power Reduction Compared to LSTTL CT158) generators. Logic ICs /Subject • HC Types (High Ordering Information - 2V to 6V Operation Speed - High Noise Immunity: N = 30%, N = 30%of V at TEMP. RANGE IL IH CC o V = 5V PART NUMBER ( C) PACKAGE CC • HCT Types CD54HC157F3A -55 to 125 16 Ld CERDIP - 4.5V to 5.5V Operation CD54HCT157F3A -55 to 125 16 Ld CERDIP - Direct LSTTL Input Logic Compatibility, V = 0.8V (Max), V = 2V (Min) CD54HCT158F3A -55 to 125 16 Ld CERDIP IL IH - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HC157E -55 to 125 16 Ld PDIP CD74HC157M -55 to 125 16 Ld SOIC Pinout CD74HC157MT -55 to 125 16 Ld SOIC CD54HC157, CD54HCT157, CD54HC158, CD54HCT158 CD74HC157M96 -55 to 125 16 Ld SOIC (CERDIP) CD74HC157, CD74HCT157, CD74HC158 CD74HCT157E -55 to 125 16 Ld PDIP (PDIP, SOIC) CD74HCT158 CD74HCT157M -55 to 125 16 Ld SOIC (PDIP) CD74HCT157MT -55 to 125 16 Ld SOIC TOP VIEW CD74HCT157M96 -55 to 125 16 Ld SOIC S 1 16 V CC 1I 2 15 E CD74HCT158E -55 to 125 16 Ld PDIP 0 1I 3 14 4I 1 0 NOTE: When ordering, use the entire part number. The suffix 96 1Y 4 13 4I denotes tape and reel. The suffix T denotes a small-quantity reel of 1 250. 2I 5 12 4Y 0 2I 6 11 3I 1 0 2Y 7 10 3I 1 GND 8 9 3Y CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
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