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CD54HC7266F3AN/a10avaiHigh Speed CMOS Logic


CD54HC7266F3A ,High Speed CMOS LogicMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC73F ,High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with ResetMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC73F ,High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with ResetLogic Diagram14 (7)J12 (9)QJ3(10)K KCL1 (5)13 (8)CP nA QCLR2 (6)R2CD54HC73, CD74HC73, CD74HCT73Abso ..
CD54HC73F. ,High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with ResetMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC73F3A ,High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with ResetFeatures Description• Hysteresis on Clock Inputs for Improved Noise The ’HC73 and CD74HCT73 utilize ..
CD54HC74F ,High Speed CMOS Logic Dual Positive-Edge Trigger D Flip-Flops with Set and ResetMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
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CD54HC7266F3A
High Speed CMOS Logic
CD54HC7266, CD74HC7266 SCHS219D High-Speed CMOS Logic August 1997 - Revised September 2003 Quad 2-Input EXCLUSIVE NOR Gate Features Description • Four Independent EXCLUSIVE NOR Gates The ’HC7266 contains four independent Exclusive NOR gates in one package. They provide the system designer • Buffered Inputs and Outputs [ /Title with a means for implementation of the EXCLUSIVE NOR • Logical Comparators (CD74H function. • Parity Generators and Checkers C7266) This device is functionally the same as the TTL226. They /Subject • Adders/Subtracters differ in that the ’HC7266 has active high and low outputs whereas the 226 has open collector outputs. (High • Fanout (Over Temperature Range) Speed - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads Ordering Information - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads CMOS o o Logic C to 125 C • Wide Operating Temperature Range . . . -55 TEMP. RANGE o Quad 2- PART NUMBER ( C) PACKAGE • Balanced Propagation Delay and Transition Times Input • Significant Power Reduction Compared to LSTTL CD54HC7266F3A -55 to 125 14 Ld CERDIP EXCLU- Logic ICs CD74HC7266E -55 to 125 14 Ld PDIP SIVE • HC Types CD74HC7266M -55 to 125 14 Ld SOIC - 2V to 6V Operation - High Noise Immunity: N = 30%, N = 30%of V at CD74HC7266MT -55 to 125 14 Ld SOIC IL IH CC V = 5V CC CD74HC7266M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. Pinout CD54HC7266 (CERDIP) CD74HC7266 (PDIP, SOIC) TOP VIEW 1A 1 14 V CC 1B 2 13 4B 1Y 3 12 4A 2Y 4 11 4Y 2A 5 10 3Y 2B 6 9 3B GND 7 8 3A CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
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