CD54HC4520F3A ,High Speed CMOS Logic Dual Binary Up-CounterCD74HC4518, CD54HC4520,CD74HC4520, CD74HCT4520Data sheet acquired from Harris SemiconductorSCHS216D ..
CD54HC4520F3A ,High Speed CMOS Logic Dual Binary Up-CounterFeaturesincrementing on either the positive-going or the negative-• Positive or Negative Edge Trigg ..
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CD54HC4538F3A ,High Speed CMOS Logic Dual Retriggerable Precision Monostable MultivibratorMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
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CHL8266 ,6 phase multiphase PWM controller for high efficiency graphics processor VR solutionsfeatures. PSI can be programmed to be up to four phases 1-phase to 2-phase PSI for Light Loads fo ..
CD54HC4520F-CD54HC4520F.-CD54HC4520F3A
High Speed CMOS Logic Dual Binary Up-Counter
CD74HC4518, CD54HC4520, CD74HC4520, CD74HCT4520 SCHS216D High-Speed CMOS Logic Dual Synchronous Counters November 1997 - Revised October 2003 having interchangeable CLOCK and ENABLE lines for Features incrementing on either the positive-going or the negative- • Positive or Negative Edge Triggering going transition of CLOCK. The counters are cleared by high levels on the MASTER RESET lines. The counter can be • Synchronous Internal Carry Propagation [ /Title cascaded in the ripple mode by connecting Q to the 3 (CD74 • Fanout (Over Temperature Range) ENABLE input of the subsequent counter while the CLOCK input of the latter is held low. HC451 - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads 8, Ordering Information o o CD74 • Wide Operating Temperature Range . . . -55 C to 125 C HC452 TEMP. RANGE • Balanced Propagation Delay and Transition Times o PART NUMBER ( C) PACKAGE 0, • Significant Power Reduction Compared to LSTTL CD74 CD54HC4520F3A -55 to 125 16 Ld CERDIP Logic ICs HCT45 CD74HC4518E -55 to 125 16 Ld PDIP • HC Types 20) - 2V to 6V Operation CD74HC4520E -55 to 125 16 Ld PDIP /Sub- - High Noise Immunity: N = 30%, N = 30% of V IL IH CC ject CD74HC4520M -55 to 125 16 Ld SOIC at V = 5V CC CD74HC4520MT -55 to 125 16 Ld SOIC • HCT Types - 4.5V to 5.5V Operation CD74HC4520M96 -55 to 125 16 Ld SOIC - Direct LSTTL Input Logic Compatibility, CD74HCT4520E -55 to 125 16 Ld PDIP = 0.8V (Max), V = 2V (Min) V IL IH - CMOS Input Compatibility, I ≤ 1µA at V , V CD74HCT4520M -55 to 125 16 Ld SOIC l OL OH CD74HCT4520MT -55 to 125 16 Ld SOIC Description CD74HCT4520M96 -55 to 125 16 Ld SOIC The CD74HC4518 is a dual BCD up-counter. The ’HC4520 and CD74HCT4520 are dual binary up-counters. Each NOTE: When ordering, use the entire part number. The suffix 96 device consists of two independent internally synchronous denotes tape and reel. The suffix T denotes a small-quantity reel 4-stage counters. The counter stages are D-type flip-flops of 250. Pinout CD54HC4520 (CERDIP) CD74HC4518 (PDIP) CD74HC4520, CD74HCT4520, (PDIP, SOIC) TOP VIEW 1CP 1 16 V CC 1E 2 15 2MR 1Q 3 14 2Q 0 3 1Q 4 13 2Q 1 2 1Q 5 12 2Q 2 1 1Q 6 11 2Q 3 0 10 2E 1MR 7 9 2CP GND 8 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
