CD54HC367F3A ,High Speed CMOS Logic Non-Inverting Hex Buffer/Line Driver with 3-State OutputsMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
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CD54HC367F3A
High Speed CMOS Logic Non-Inverting Hex Buffer/Line Driver with 3-State Outputs
CD54/74HC367, CD54/74HCT367, CD54/74HC368, CD74HCT368 High-Speed CMOS Logic Hex Buffer/Line Driver, SCHS181D November 1997 - Revised October 2003 Three-State Non-Inverting and Inverting Features Ordering Information TEMP. RANGE • Buffered Inputs o PART NUMBER ( C) PACKAGE • High Current Bus Driver Outputs [ /Title CD54HC367F3A -55 to 125 16 Ld CERDIP (CD74 • Two Independent Three-State Enable Controls CD54HC368F3A -55 to 125 16 Ld CERDIP HC367 CD54HCT367F3A -55 to 125 16 Ld CERDIP ,t = 8ns at V =5V, • Typical Propagation Delay t PLH PHL CC o , C = 15pF, T = 25 C CD74HC367E -55 to 125 16 Ld PDIP L A D74 C CD74HC367M -55 to 125 16 Ld SOIC • Fanout (Over Temperature Range) HCT36 CD74HC367MT -55 to 125 16 Ld SOIC - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads 7, CD74HC367M96 -55 to 125 16 Ld SOIC - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads CD74 CD74HC368E -55 to 125 16 Ld PDIP o o • Wide Operating Temperature Range . . . -55 C to 125 C CD74HC368M -55 to 125 16 Ld SOIC HC368 • Balanced Propagation Delay and Transition Times CD74HC368MT -55 to 125 16 Ld SOIC , • Significant Power Reduction Compared to LSTTL CD74HC368M96 -55 to 125 16 Ld SOIC D74 C Logic ICs CD74HCT367E -55 to 125 16 Ld PDIP HCT36 CD74HCT367M -55 to 125 16 Ld SOIC • HC Types 8) - 2V to 6V Operation CD74HCT367MT -55 to 125 16 Ld SOIC /Sub- = 30%, N = 30% of V - High Noise Immunity: N CD74HCT367M96 -55 to 125 16 Ld SOIC IL IH CC ject at V = 5V CC CD74HCT368E -55 to 125 16 Ld PDIP (High CD74HCT368M -55 to 125 16 Ld SOIC • HCT Types Speed - 4.5V to 5.5V Operation CD74HCT368MT -55 to 125 16 Ld SOIC - Direct LSTTL Input Logic Compatibility, CD74HCT368M96 -55 to 125 16 Ld SOIC V = 0.8V (Max), V = 2V (Min) IL IH NOTE: When ordering, use the entire part number. The suffix 96 ≤ 1µA at V , V - CMOS Input Compatibility, I denotes tape and reel. The suffix T denotes a small-quantity reel of l OL OH 250. Description The ’HC367, ’HCT367, ’HC368, and CD74HCT368 silicon gate CMOS three-state buffers are general purpose high-speed non-inverting and inverting buffers. They have high drive cur- rent outputs which enable high speed operation even when driving large bus capacitances. These circuits possess the low power dissipation of CMOS circuitry, yet have speeds compara- ble to low power Schottky TTL circuits. Both circuits are capable of driving up to 15 low power Schottky inputs. The ’HC367 and ’HCT367 are non-inverting buffers, whereas the ’HC368 and CD74HCT368 are inverting buffers. These devices have two output enables, one enable (OE1) controls 4 gates and the other (OE2) controls the remaining 2 gates. The ’HCT367 and CD74HCT368 logic families are speed, func- tion and pin compatible with the standard LS logic family. CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
