CD54HC366F3A ,High Speed CMOS Logic Inverting Hex Buffer/Line Driver with 3-State OutputsMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
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CD54HC366F3A
High Speed CMOS Logic Inverting Hex Buffer/Line Driver with 3-State Outputs
CD54/74HC365, CD54/74HCT365, CD54/74HC366 SCHS180C High Speed CMOS Logic Hex Buffer/Line Driver, November 1997 - Revised October 2003 Three-State Non-Inverting and Inverting low power Schottky TTL circuits. Both circuits are capable of Features driving up to 15 low power Schottky inputs. • Buffered Inputs The ’HC365 and ’HCT365 are non-inverting buffers, whereas • High Current Bus Driver Outputs [ /Title the ’HC366 is an inverting buffer. These devices have two three-state control inputs (OE1 and OE2) which are NORed (CD74 ,t = 8ns at V =5V, • Typical Propagation Delay t PLH PHL CC together to control all six gates. o C = 15pF, T = 25 C HC365 L A The ’HCT365 logic families are speed, function and pin , • Fanout (Over Temperature Range) compatible with the standard LS logic family. D74 - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads C Ordering Information - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads HCT36 o o 5, • Wide Operating Temperature Range . . . -55 C to 125 C TEMP. RANGE o PART NUMBER ( C) PACKAGE CD74 • Balanced Propagation Delay and Transition Times HC366 CD54HC365F3A -55 to 125 16 Ld CERDIP • Significant Power Reduction Compared to LSTTL , CD54HC366F3A -55 to 125 16 Ld CERDIP Logic ICs D74 C CD54HCT365F3A -55 to 125 16 Ld CERDIP • HC Types HCT36 CD74HC365E -55 to 125 16 Ld PDIP - 2V to 6V Operation 6) CD74HC365M -55 to 125 16 Ld SOIC - High Noise Immunity: N = 30%, N = 30% of V IL IH CC /Sub- at V = 5V CD74HC365MT -55 to 125 16 Ld SOIC CC ject CD74HC365M96 -55 to 125 16 Ld SOIC • HCT Types (High - 4.5V to 5.5V Operation CD74HC366E -55 to 125 16 Ld PDIP Speed - Direct LSTTL Input Logic Compatibility, CD74HC366M -55 to 125 16 Ld SOIC V = 0.8V (Max), V = 2V (Min) IL IH CD74HC366M96 -55 to 125 16 Ld SOIC - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HCT365E -55 to 125 16 Ld PDIP Description CD74HCT365M -55 to 125 16 Ld SOIC CD74HCT365MT -55 to 125 16 Ld SOIC The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three- state buffers are general purpose high-speed non-inverting CD74HCT365M96 -55 to 125 16 Ld SOIC and inverting buffers. They have high drive current outputs NOTE: When ordering, use the entire part number. The suffix 96 which enable high speed operation even when driving large denotes tape and real. The suffix T denotes a small-quantity reel of bus capacitances. These circuits possess the low power 250. dissipation of CMOS circuitry, yet have speeds comparable to Pinout CD54HC365, CD54HCT365, CD54HC366 (CERDIP) CD74HC365, CD74HCT365, CD74HC366 (PDIP, SOIC) TOP VIEW OE1 1 16 V CC 1A 2 15 OE2 (1Y) 1Y 3 14 6A 2A 4 13 6Y (6Y) (2Y) 2Y 5 12 5A 3A 6 11 5Y (5Y) (3Y) 3Y 7 10 4A GND 8 9 4Y (4Y) CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
