CD54HC164F3A ,High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift RegisterMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC165F3A ,High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift RegisterMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC166F3A ,High Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift RegisterMaximum Ratings Thermal InformationoDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . ..
CD54HC173F ,High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State OutputsCD54HC173, CD74HC173,CD54HCT173, CD74HCT173Data sheet acquired from Harris SemiconductorSCHS158EHig ..
CD54HC173F ,High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State OutputsLogic Diagram9E110E2VCCDQ14PD03Q07CP CP QNR15MR1OE12OE213 4D1 Q112 53 CIRCUITS IDENTICAL TO ABOVE C ..
CD54HC173F3A ,High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State OutputsMaximum Ratings Thermal InformationDC Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . ..
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CD54HC164F-CD54HC164F3A
High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register
CD54HC164, CD74HC164, CD54HCT164, CD74HCT164 SCHS155C High-Speed CMOS Logic October 1997 - Revised August 2003 8-Bit Serial-In/Parallel-Out Shift Register Features Description • Buffered Inputs The ’HC164 and ’HCT164 are 8-bit serial-in parallel-out shift registers with asynchronous reset. Data is shifted on the • Asynchronous Master Reset [ /Title positive edge of Clock (CP). A LOW on the Master Reset (CD74 = 60MHz at V = 5V, C = 15pF, (MR) pin resets the shift register and all outputs go to the • Typical f MAX CC L o T = 25 C LOW state regardless of the input conditions. Two Serial HC164 A Data inputs (DS1 and DS2) are provided, either one can be , • Fanout (Over Temperature Range) used as a Data Enable control. - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads D74 C - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads HCT16 Ordering Information o o • Wide Operating Temperature Range . . . -55 C to 125 C 4) TEMP. RANGE /Sub- • Balanced Propagation Delay and Transition Times o PART NUMBER ( C) PACKAGE ject • Significant Power Reduction Compared to LSTTL CD54HC164F3A -55 to 125 14 Ld CERDIP Logic ICs (High CD54HCT164F3A -55 to 125 14 Ld CERDIP Speed • HC Types - 2V to 6V Operation CMOS CD74HC164E -55 to 125 14 Ld PDIP - High Noise Immunity: N = 30%, N = 30% of V IL IH CC Logic at V = 5V CD74HC164M -55 to 125 14 Ld SOIC CC 8-Bit • HCT Types CD74HC164MT -55 to 125 14 Ld SOIC Serial- - 4.5V to 5.5V Operation In/Par- CD74HC164M96 -55 to 125 14 Ld SOIC - Direct LSTTL Input Logic Compatibility, allel- V = 0.8V (Max), V = 2V (Min) IL IH CD74HCT164E -55 to 125 14 Ld PDIP - CMOS Input Compatibility, I ≤ 1µA at V , V l OL OH CD74HCT164M -55 to 125 14 Ld SOIC CD74HCT164MT -55 to 125 14 Ld SOIC CD74HCT164M96 -55 to 125 14 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. Pinout CD54HC164, CD54HCT164 (CERDIP) CD74HC164, CD74HCT164 (PDIP, SOIC) TOP VIEW DS1 1 14 V CC DS2 2 13 Q 7 Q 3 12 Q 0 6 Q 4 11 Q 1 5 Q 5 10 Q 2 4 Q 6 9 MR 3 GND 7 8 CP CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, 1
