CD54ACT174F3A ,Hex D Flip-Flops with Reset CD54ACT174, CD74ACT174 HEX D-TYPE FLIP-FLOPSWITH CLEARSCHS344 – APRIL 2003CD54ACT174 ...F PACKAGE ..
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CD54ACT174F3A
Hex D Flip-Flops with Reset
Speed of Bipolar F, AS, and S, WithSignificantly Reduced Power Consumption Balanced Propagation Delays ±24-mA Output Drive Current
– Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and
Circuit Design Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015 Applications Include:
– Buffer/Storage Registers
– Shift Registers
description/ordering informationThe ’ACT174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input and are
designed for 4.5-V to 5.5-V VCC operation.
Information at the data (D) inputs that meets the setup time requirements is transferred to the outputs on the
positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not
directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low
level, the D input has no effect at the output.
ORDERING INFORMATION Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each flip-flop)GND
CLK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.