CD4514BCWMX , 4-Bit Latched/4-to-16 Line Decodersapplications where low power dissipa-tion and/or high noise immunity is required.
CD4514BCWMX
4-Bit Latched/4-to-16 Line Decoders
CD4514BC• CD4515BC 4-Bit Latched/4-to-16 Line Decoders October 1987 Revised August 2000 CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders General Description Features The CD4514BC and CD4515BC are 4-to-16 line decodersWide supply voltage range: 3.0V to 15V with latched inputs implemented with complementary MOSHigh noise immunity: 0.45 V (typ.) DD (CMOS) circuits constructed with N- and P-channel Low power TTL: fan out of 2 enhancement mode transistors. These circuits are prima- compatibility: driving 74L rily used in decoding applications where low power dissipa- tion and/or high noise immunity is required.Low quiescent power dissipation: 0.025 μW/package @ 5.0 V The CD4514BC (output active high option) presents a logi- DC cal “1” at the selected output, whereas the CD4515BC pre-Single supply operation sents a logical “0” at the selected output. The input latches 12 Input impedance = 10 Ω typically are R–S type flip-flops, which hold the last input data pre- Plug-in replacement for MC14514, MC14515 sented prior to the strobe transition from “1” to “0”. This input data is decoded and the corresponding output is acti- vated. An output inhibit line is also available. Ordering Code: Order Number Package Number Package Diagram CD4514BCWM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide CD4514BCN N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide CD4515BCWM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide CD4515BCN N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600 Wide Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Top View © 2000 DS005994
