CD4515BCWM ,4-Bit Latched/4-to-16 Line DecodersElectrical Characteristics” provide conditions for actual device opera- (Soldering, 10 seconds) 260 ..
CD4515BF3A ,CMOS 4-Bit Latch/4-to-16 Line Decoder with Output 'Low' on Select
CD4515BF3A ,CMOS 4-Bit Latch/4-to-16 Line Decoder with Output 'Low' on Select
CD4515BM ,4-Bit Latched/4-to-16 Line DecodersMAXIMUM RATINGS, Absoluttr-Maximum Values:DC SUPPLY-VOLTAGE RANGE, (VDD)Voltages referenced to vss ..
CD4516BE ,CMOS Presettable Binary Up/Down CounterMAXIMUM RATINGS; Absolute-Maximum Values:Dc SUPPLY-VOLTAGE RANGE, (VDD)Voltages referenced to vss T ..
CD4516BF ,CMOS Presettable Binary Up/Down CounterMAXIMUM RATINGS; Absolute-Maximum Values:Dc SUPPLY-VOLTAGE RANGE, (VDD)Voltages referenced to vss T ..
CGS74CT2525MX ,1-to-8 Minimum Skew Clock DriverCGS74C2525 CGS74CT2525 CGS74C2526 CGS74CT2526# # #1-to-8MinimumSkewClockDriverSeptember1995CGS74C25 ..
CGS74CT2525N ,1-to-8 Minimum Skew Clock DriverFeaturesone input driving eight outputs specifically designed for sig-Y TMThese CGS devices impleme ..
CGS74CT2526M ,1-to-8 Minimum Skew Clock Driver [Life-time buy]CGS74C2525 CGS74CT2525 CGS74C2526 CGS74CT2526# # #1-to-8MinimumSkewClockDriverSeptember1995CGS74C25 ..
CGS74LCT2524M ,1 to 4 Minimum Skew (300 ps) 3 Volts Clock DriverElectrical CharacteristicsOver recommended operating conditions unless specified otherwise.CGS74LCT ..
CGS74LCT2524MX ,1 to 4 Minimum Skew (300 ps) 3 Volts Clock DriverPin DescriptionPin Names DescriptionCLK Clock InputO –O Outputs0 3Truth TableInputs Outputs01195603 ..
CGY120 ,GaAs MMIC (Monolithic microwave IC MMIC-Amplifier for mobile communication)applications6* Gain Control range over 50dB* 50Ω input and output matched* Low power consumption* O ..
CD4514BCN-CD4514BCWM-CD4515BCN-CD4515BCWM
4-Bit Latched/4-to-16 Line Decoders
CD4514BC • CD4515BC 4-Bit Latched/4-to-16 Line Decoders October 1987 Revised January 2004 CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders General Description Features The CD4514BC and CD4515BC are 4-to-16 line decodersWide supply voltage range: 3.0V to 15V with latched inputs implemented with complementary MOSHigh noise immunity: 0.45 V (typ.) DD (CMOS) circuits constructed with N- and P-channel Low power TTL: fan out of 2 enhancement mode transistors. These circuits are prima- compatibility: driving 74L rily used in decoding applications where low power dissipa- tion and/or high noise immunity is required.Low quiescent power dissipation: 0.025 μW/package @ 5.0 V The CD4514BC (output active high option) presents a logi- DC cal “1” at the selected output, whereas the CD4515BC pre-Single supply operation sents a logical “0” at the selected output. The input latches 12 Input impedance = 10 Ω typically are R–S type flip-flops, which hold the last input data pre- Plug-in replacement for MC14514, MC14515 sented prior to the strobe transition from “1” to “0”. This input data is decoded and the corresponding output is acti- vated. An output inhibit line is also available. Ordering Code: Order Number Package Number Package Diagram CD4514BCWM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide CD4514BCN N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide CD4515BCWM 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide M24B (Note 1) CD4515BCN N24A 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-011, 0.600" Wide Note 1: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Top View © 2004 DS005994
