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CMOS Hex Non-Inverting Buffer/Converter
Sample & Support & Reference Product Tools & Technical Community Buy Design Folder Documents Software CD4049UB, CD4050B SCHS046J – AUGUST 1998 – REVISED SEPTEMBER 2016 CD4049UB and CD4050B CMOS Hex Inverting Buffer and Converter 1 Features 3 Description The CD4049UB and CD4050B devices are inverting 1• CD4049UB Inverting and noninverting hex buffers, and feature logic-level • CD4050B Noninverting conversion using only one supply voltage (V ). The CC • High Sink Current for Driving 2 TTL Loads input-signal high level (V ) can exceed the V IH CC supply voltage when these devices are used for logic- • High-to-Low Level Logic Conversion level conversions. These devices are intended for use • 100% Tested for Quiescent Current at 20 V as CMOS to DTL or TTL converters and can drive • Maximum Input Current of 1 µA at 18 V Over Full directly two DTL or TTL loads. (V = 5 V, CC Package Temperature Range; 100 nA at 18 V and V ≤ 0.4 V, and I ≥ 3.3 mA.) OL OL 25°C (1) Device Information • 5-V, 10-V, and 15-V Parametric Ratings PART NUMBER PACKAGE BODY SIZE (NOM) 2 Applications CD4049UBE, PDIP (16) 3.90 mm × 19.30 mm CD4050BE • CMOS to DTL or TTL Hex Converters CD4049UBD, SOIC (16) 9.90 mm × 3.91 mm • CMOS Current Sink or Source Drivers CD4050BD • CMOS High-to-Low Logic Level Converters CD4049UBDW, SOIC (16) 10.30 mm × 7.50 mm CD4050BDW CD4049UBNS, SO (16) 19.30 mm × 6.35 mm CD4050BNS CD4049UBPW, TSSOP (16) 5.00 mm × 4.40 mm CD4050BPW (1) For all available packages, see the orderable addendum at the end of the data sheet. Schematic Diagram of CD4049UB Schematic Diagram of CD4050B V V CC CC P P P R OUT R IN IN OUT N N N V SS V SS Copyright © 2016, Copyright © 2016, 1 of 6 Identical Units 1 of 6 Identical Units 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
