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CD4046BCMFAIRCHILDN/a1avaiMicropower Phase-Locked Loop
CD4046BCMXNSN/a5000avaiMicropower Phase-Locked Loop
CD4046BCNFSCN/a3avaiMicropower Phase-Locked Loop


CD4046BCMX ,Micropower Phase-Locked LoopFeaturesThe CD4046BC micropower phase-locked loop (PLL) con-

CD4046BCM-CD4046BCMX-CD4046BCN
Micropower Phase-Locked Loop
CD4046BC Micropower Phase-Locked Loop October 1987 Revised March 2002 CD4046BC Micropower Phase-Locked Loop General Description Features The CD4046BC micropower phase-locked loop (PLL) con-Wide supply voltage range: 3.0V to 18V sists of a low power, linear, voltage-controlled oscillatorLow dynamic power consumption: 70 μW (typ.) (VCO), a source follower, a zener diode, and two phase at f = 10 kHz, V = 5V o DD comparators. The two phase comparators have a common VCO frequency: 1.3 MHz (typ.) at V = 10V DD signal input and a common comparator input. The signal input can be directly coupled for a large voltage signal, orLow frequency drift: 0.06%/°C at V = 10V with DD capacitively coupled to the self-biasing amplifier at the sig- temperature nal input for a small voltage signal. High VCO linearity: 1% (typ.) Phase comparator I, an exclusive OR gate, provides a digi- tal error signal (phase comp. I Out) and maintains 90° Applications phase shifts at the VCO center frequency. Between signal • FM demodulator and modulator input and comparator input (both at 50% duty cycle), it may lock onto the signal input frequencies that are close to har-Frequency synthesis and multiplication monics of the VCO center frequency.Frequency discrimination Phase comparator II is an edge-controlled digital memoryData synchronization and conditioning network. It provides a digital error signal (phase comp. II Voltage-to-frequency conversion Out) and lock-in signal (phase pulses) to indicate a locked Tone decoding condition and maintains a 0° phase shift between signal FSK modulation input and comparator input. The linear voltage-controlled oscillator (VCO) produces anMotor speed control output signal (VCO Out) whose frequency is determined by the voltage at the VCO input, and the capacitor and resis- IN tors connected to pin C1 , C1 , R1 and R2. A B The source follower output of the VCO (demodulator Out) IN is used with an external resistor of 10 kΩ or more. The INHIBIT input, when high, disables the VCO and source follower to minimize standby power consumption. The zener diode is provided for power supply regulation, if necessary. Ordering Code: Order Number Package Number Package Description CD4046BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4046BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. © 2002 DS005968
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