CD4042BDR ,CMOS Quad Clocked 'D' Latchblock diagram andtruth tabla.0040428 TypesMN? TWA“ "Allis“:
CD4042BE ,CMOS Quad Clocked 'D' LatchMAXIMUM RATINGS, Absolute-Maximum Values:DC SUPPLY-VOLTAGE RANGE, NDD)DEVICE DISSPATION PER OUTPUT ..
CD4042BF ,CMOS Quad Clocked 'D' LatchMAXIMUM RATINGS, Absolute-Maximum Values:DC SUPPLY-VOLTAGE RANGE, NDD)DEVICE DISSPATION PER OUTPUT ..
CD4042BF3A ,CMOS Quad Clocked 'D' LatchMAXIMUM RATINGS, Absolute-Maximum Values:DC SUPPLY-VOLTAGE RANGE, NDD)DEVICE DISSPATION PER OUTPUT ..
CD4042BM ,Quad Clocked D LatchFeaturesYWide supply voltage range 3.0V to 15VThe CD4042BM/CD4042BC quad clocked ‘‘D’’ latch is aYm ..
CD4042BM ,Quad Clocked D LatchElectrical Characteristics’’ provide conditions for actual deviceoperation.eNote 2: V 0V unless oth ..
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CEM11M2 ,Excel Technology - Dual N-Channel Enhancement Mode Field Effect Transistor
CEM2401 ,Excel Technology - P-Channel Enhancement Mode Field Effect Transistor
CEM2401 ,Excel Technology - P-Channel Enhancement Mode Field Effect Transistor
CEM2539 ,Excel Technology - Dual Enhancement Mode Field Effect Transistor (N and P Channel)
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CD4042BDR-CD4042BE-CD4042BNSR
CMOS Quad Clocked 'D' Latch
SCHS040D − Revised October 2003 The CD4042B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffixes), 16-lead dual-in-line plastic package (E suffix), 16-lead small-outline packages (D, DR, DT, DW, DWR, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). Copyright 2003,
