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CD4021BCNFAIRCHILN/a169avai8-Stage Static Shift Register
CD4021BCNNSN/a372avai8-Stage Static Shift Register
CD4021BCNFAIRCHILPN/a5000avai8-Stage Static Shift Register
CD4021BCMFN/a2avai8-Stage Static Shift Register
CD4021BCMFAIRCHILDN/a466avai8-Stage Static Shift Register
CD4021BCMNSCN/a250avai8-Stage Static Shift Register
CD4021BCMXFAIRCHILDN/a1000avai8-Stage Static Shift Register
CD4021BCNNSCN/a68avai8-Stage Static Shift Register


CD4021BCN ,8-Stage Static Shift RegisterElectrical Characteristics” providesLead Temperature (T )Lconditions for actual device operation.(S ..
CD4021BCN ,8-Stage Static Shift RegisterFeaturesThe CD4021BC is an 8-stage parallel input/serial output

CD4021BCM-CD4021BCMX-CD4021BCN
8-Stage Static Shift Register
CD4021BC 8-Stage Static Shift Register October 1987 Revised March 2002 CD4021BC 8-Stage Static Shift Register General Description Features The CD4021BC is an 8-stage parallel input/serial outputWide supply voltage range: 3.0V to 15V shift register. A parallel/serial control input enables individ-High noise immunity: 0.45 V (typ.) DD ual JAM inputs to each of 8 stages. Q outputs are available Low power TTL compatibility: from the sixth, seventh, and eighth stages. All outputs have Fan out of 2 driving 74L or 1 driving 74LS equal source and sink current capabilities and conform to standard “B” series output drive.5V–10V–15V parametric ratings When the parallel/serial control input is in the logical “0”Symmetrical output characteristics state, data is serially shifted into the register synchronously Maximum input leakage 1 μA at 15V over full tempera- with the positive transition of the clock. When the parallel/ ture range serial control is in the logical “1” state, data is jammed into each stage of the register asynchronously with the clock. All inputs are protected against static discharge with diodes to V and V . DD SS Ordering Code: Order Number Order Code Package Description CD4021BCM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow CD4021BCN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table C Parallel/ PI 1 PI n Q L n Serial Q1 Serial (Note 1) (Note 2) Input (Internal) Control XX 1 0 0 0 0 XX 1 0 1 0 1 XX 1 1 0 1 0 XX 1 1 1 1 1 00 XX 0 Q n−1 10 XX 1 Q n−1 X0 XX Q1 Q n X = Don't care case Note 1: Level change Note 2: No change Top View © 2002 DS005954
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